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Contents

README

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HGV8542M

HGSEMI · Operational Amplifier · SOP-8

HGV8542M from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of amplifier A, which swings within the supply rails (the datasheet specifies V_OH and V_OL against V+ and V-).
2 -IN A input Inverting input of amplifier A; differential input voltage must stay within the absolute maximum rating of ±VS.
3 +IN A input Non-inverting input of amplifier A; the common-mode input range spans the supply rails (VCM = 0 V to VS in the CMRR specification).
4 V- power_in Negative supply rail; the operating supply is 2.7 V to 5.5 V and the absolute maximum total supply (V+ to V-) is 6 V, with GND between V- and V+.
5 +IN B input Non-inverting input of amplifier B; the common-mode input range spans the supply rails (VCM = 0 V to VS in the CMRR specification).
6 -IN B input Inverting input of amplifier B; differential input voltage must stay within the absolute maximum rating of ±VS.
7 OUT B output Output of amplifier B, which swings within the supply rails (the datasheet specifies V_OH and V_OL against V+ and V-).
8 V+ power_in Positive supply rail; the operating supply is 2.7 V to 5.5 V and the absolute maximum total supply (V+ to V-) is 6 V.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VS 6 V 5
Differential input voltage -6 6 V 5
Operating temperature range -40 125 °C 5
Storage temperature range -65 150 °C 5
Lead temperature 300 °C soldering, 60 s 5
Supply voltage range VS 2.7 5.5 V 1
Operating temperature range TA -40 125 °C 1
Junction-to-ambient thermal resistance (8-pin SOIC) θJA 158 °C/W 8-pin SOIC (R) 5
Junction-to-case thermal resistance (8-pin SOIC) θJC 43 °C/W 8-pin SOIC (R) 5
Input offset voltage VOS 1 6 mV VS = 2.7 V, VCM = 1.35 V, TA = 25°C 2
Input offset voltage over temperature VOS 7 mV −40°C ≤ TA ≤ +125°C 2
Input bias current IB 4 60 pA VS = 2.7 V, VCM = 1.35 V, TA = 25°C 2
Input bias current over temperature IB 100 pA −40°C ≤ TA ≤ +85°C 2
Input bias current over temperature IB 1000 pA −40°C ≤ TA ≤ +125°C 2
Input offset current IOS 0.1 30 pA VS = 2.7 V, VCM = 1.35 V, TA = 25°C 2
Input offset current over temperature IOS 50 pA −40°C ≤ TA ≤ +85°C 2
Input offset current over temperature IOS 500 pA −40°C ≤ TA ≤ +125°C 2
Common-mode rejection ratio CMRR 40 45 dB VS = 2.7 V, VCM = 0 V to 2.7 V 2
Common-mode rejection ratio over temperature CMRR 38 dB −40°C ≤ TA ≤ +125°C 2
Large-signal voltage gain AVO 100 500 V/mV RL = 100 kΩ, VO = 0.5 V to 2.2 V 2
Large-signal voltage gain over temperature AVO 50 V/mV −40°C ≤ TA ≤ +85°C 2
Large-signal voltage gain over temperature AVO 2 V/mV −40°C ≤ TA ≤ +125°C 2
Input offset voltage drift ΔVOS/ΔT 4 μV/°C −40°C ≤ TA ≤ +125°C 2
Input bias current drift ΔIB/ΔT 100 fA/°C −40°C ≤ TA ≤ +85°C 2
Input bias current drift ΔIB/ΔT 2000 fA/°C −40°C ≤ TA ≤ +125°C 2
Input offset current drift ΔIOS/ΔT 25 fA/°C −40°C ≤ TA ≤ +125°C 2
High-level output voltage VOH 2.575 2.65 V IL = 1 mA, VS = 2.7 V 2
High-level output voltage over temperature VOH 2.55 V −40°C ≤ TA ≤ +125°C 2
Low-level output voltage VOL 35 100 mV IL = 1 mA, VS = 2.7 V 2
Low-level output voltage over temperature VOL 125 mV −40°C ≤ TA ≤ +125°C 2
Output short-circuit current (sourcing/sinking) IOUT 15 mA VOUT = VS − 1 V 2
Short-circuit current ISC -20 20 mA 2
Open-loop output impedance ZOUT 50 Ω f = 200 kHz, AV = 1 2
Power supply rejection ratio PSRR 65 76 dB VS = 2.5 V to 6 V 2
Power supply rejection ratio over temperature PSRR 60 dB −40°C ≤ TA ≤ +125°C 2
Supply current per amplifier ISY 38 55 μA VO = 0 V, VS = 2.7 V 2
Supply current per amplifier over temperature ISY 75 μA −40°C ≤ TA ≤ +125°C 2
Slew rate SR 0.4 0.75 V/μs RL = 100 kΩ 2
Settling time to 0.1% tS 5 μs to 0.1% (1 V step) 2
Gain bandwidth product GBP 980 kHz 2
Phase margin ΦM 63 ° 2
Input voltage noise density en 40 nV/√Hz f = 1 kHz 2
Input voltage noise density en 38 nV/√Hz f = 10 kHz 2
Input current noise density in 0.1 pA/√Hz 2
Supply current per amplifier (3 V table) ISY 40 60 μA VO = 0 V (3 V table) 3
Supply current per amplifier over temperature (3 V table) ISY 75 μA −40°C ≤ TA ≤ +125°C 3
Supply current per amplifier (5 V table) ISY 45 65 μA VO = 0 V (5 V table) 4
Supply current per amplifier over temperature (5 V table) ISY 85 μA −40°C ≤ TA ≤ +125°C 4
Slew rate (5 V table) SR 0.45 0.92 V/μs RL = 100 kΩ, CL = 200 pF 4
Gain bandwidth product (5 V table) GBP 1000 kHz 4

CAD (KiCad official)

  • Symbol: HGV8542M
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: hgv8542m-etched.step / hgv8542m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hgv8542m.step / hgv8542m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (15 pp, sha256 fc99488bc7b54830, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF