component
HG25Q32BM
Public Made by Adomby adom
HGSEMI NOR FLASH, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HG25Q32BM
HGSEMI · NOR FLASH · SOP-8
HG25Q32BM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip Enable: high deselects the device and puts the outputs in high impedance with standby power, low selects it; must transition high to low after power-up before a new instruction is accepted. |
| 2 | DO(IO1) | bidirectional | Serial Data Output in standard SPI, shifted out on the falling edge of CLK, and becomes IO1 (input/output) during Dual and Quad commands. |
| 3 | WP#(IO2) | bidirectional | Write Protect input that prevents the Status Register from being written in standard/dual SPI, and becomes IO2 when Quad mode is enabled (QE=1). |
| 4 | GND | power_in | Ground. |
| 5 | DI(IO0) | bidirectional | Serial Data Input that receives instructions, addresses and data latched on the rising edge of CLK, and becomes IO0 (input/output) during Dual and Quad commands. |
| 6 | CLK | input | Serial Clock Input that provides the timing for serial input and output operations. |
| 7 | HOLD#/RESET#(IO3) | bidirectional | HOLD# pauses the device while selected (HRSW=0) or RESET# resets it when held low for about 1us minimum (HRSW=1), and becomes IO3 when Quad mode is enabled (QE=1). |
| 8 | VCC | power_in | Power supply, 2.3-3.6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
HG25Q32BM - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hg25q32bm-etched.step/hg25q32bm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hg25q32bm.step/hg25q32bm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (75 pp, sha256
3ce45d646e4b7e90, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HG25Q32BM
**HGSEMI** · NOR FLASH · SOP-8
HG25Q32BM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip Enable: high deselects the device and puts the outputs in high impedance with standby power, low selects it; must transition high to low after power-up before a new instruction is accepted. |
| 2 | DO(IO1) | bidirectional | Serial Data Output in standard SPI, shifted out on the falling edge of CLK, and becomes IO1 (input/output) during Dual and Quad commands. |
| 3 | WP#(IO2) | bidirectional | Write Protect input that prevents the Status Register from being written in standard/dual SPI, and becomes IO2 when Quad mode is enabled (QE=1). |
| 4 | GND | power_in | Ground. |
| 5 | DI(IO0) | bidirectional | Serial Data Input that receives instructions, addresses and data latched on the rising edge of CLK, and becomes IO0 (input/output) during Dual and Quad commands. |
| 6 | CLK | input | Serial Clock Input that provides the timing for serial input and output operations. |
| 7 | HOLD#/RESET#(IO3) | bidirectional | HOLD# pauses the device while selected (HRSW=0) or RESET# resets it when held low for about 1us minimum (HRSW=1), and becomes IO3 when Quad mode is enabled (QE=1). |
| 8 | VCC | power_in | Power supply, 2.3-3.6V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `HG25Q32BM`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `hg25q32bm-etched.step` / `hg25q32bm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hg25q32bm.step` / `hg25q32bm.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603082785888755712) (75 pp, sha256 `3ce45d646e4b7e90`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hg25q32bm-datasheet.pdf)