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HD568N

Broadic · RS-485 / RS-422 ICs · SOP-8

HD568N from Broadic, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RO	output	Receiver output, valid when RE is low: after polarity detection, RO goes high when V(A)-V(B) > 100 mV and low when V(A)-V(B) < -100 mV.
2	RE	input	Receiver output enable, active low: RE low enables RO, RE high disables the receiver, and RE high with DE low puts the whole chip into shutdown.
3	DE	input	Driver output enable: DE high enables the driver, while DE low disables it and puts its outputs in high-impedance; DE low with RE high puts the chip in shutdown.
4	DI	input	Driver input: DI low forces the non-inverting output low and the inverting output high, and DI high forces the non-inverting output high and the inverting output low.
5	GND	power_in	Ground reference for all voltages on the device.
6	X1	bidirectional	Bus interface pin that is assigned as the A or B port by the polarity detection (X1 and X2 are one A and one B); it powers up defaulting to the A port, with absolute maximum -8 V to +13 V and common-mode range -7 V to +12 V at VCC = 5 V.
7	X2	bidirectional	Bus interface pin that is assigned as the B or A port by the polarity detection (opposite of X1); it powers up defaulting to the B port, with absolute maximum -8 V to +13 V and common-mode range -7 V to +12 V at VCC = 5 V.
8	VCC	power_in	Positive supply, 3.3 V to 5 V (absolute maximum +6 V), to be bypassed to GND with a 0.1 µF capacitor.

Key specifications

Parameter	Value
Manufacturer	Broadic
Package	SOP-8
Category	Interface
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage				6	V	All voltages referenced to GND	2
Input voltage DE, RE, DI		-0.3		6	V	All voltages referenced to GND	2
Bus voltage X1, X2		-8		13	V	All voltages referenced to GND	2
Power dissipation, 8-pin SO				471	mW	8-pin SO; derate -5.9 mW/°C above +70°C	2
Junction temperature				150	°C		2
Storage temperature range		-65		150	°C		2
Soldering temperature				300	C	10 s	2
Operating temperature range		-40		125	°C		2
Supply voltage (3.3 to 5 V operation)		3.3		5	V	Product features: 3.3-5V supply voltage	2
Common-mode voltage X1, X2		-7		12	V	VCC=5V	2
Common-mode voltage X1, X2		-7		9	V	VCC=3.3V	2
Receiver differential input threshold voltage	VTH	-100		100	mV	-7V≤VCM≤+12V	3
Output leakage current, receiver high-impedance	IOZR	-1		1	µA	0.4V≤VO≤2.4V	4
Input current (X1 and X2) shutdown/power-down	ISHDN		1.8	10	µA	DE GND RE Vcc	4
Driver output short-circuit current	IOD1	-25		25	mA	0V≤VOUT≤VCC	3
Receiver output short-circuit current	IOSR	-95		95	mA	0V≤VRO≤VCC	4
Static supply current	ICC		480	600	µA	No load, RE DI GND or Vcc, DE=VCC	4
Static supply current	ICC		420	600	µA	No load, RE DI GND or Vcc, DE=GND	4
Electrostatic protection X1, X2 pins, contact discharge		-12		12	kV	IEC 61000-4-2	4
Electrostatic protection X1, X2 pins, human body model		-16		16	kV	IEC 60749-26	4
Electrostatic protection X1, X2 pins, fast transient burst		-4		4	kV	IEC61000-4-4	4
Electrostatic protection other pins, human body model		-4		4	kV	HBM JEDEC JS-001	4
Electrostatic protection other pins, charged device model		-1.5		1.5	kV	CDM JESD22-C101	4
Electrostatic protection other pins, machine model		-0.4		0.4	kV	MM JESD22-A115	4
Driver input to output delay (low to high)	tDPLH	250	720	1000	ns	Fig 3 and 5, RDIFF=54Ω, CL=54pF	5
Driver input to output delay (high to low)	tDPHL	250	720	1000	ns	Fig 3 and 5, RDIFF=54Ω, CL=54pF	5
Driver output skew	tDSKEW	-100	-3	100	ns	Fig 3 and 5, RDIFF=54Ω, CL1=CL2=100pF	5
Driver rise and fall time	tDR, tDF	400	700	1200	ns	Fig 3 and 5, RDIFF=54Ω, CL1=CL2=100pF	5
Maximum data rate	fMAX			500	kbps		5
Receiver input to output skew	tRSKD	-50	10	50	ns	Fig 7 and 9; /VID/≥2.0V; VID rise/fall time <15 ns	5
Chip shutdown time	tSHDN	50	200	600	ns	Note 4	5
Driver power dissipation derating			-5.9		mW/°C	8-pin SO; above +70°C	2

CAD (KiCad official)

Symbol: HD568N
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: hd568n-etched.step / hd568n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hd568n.step / hd568n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Broadic datasheet (12 pp, sha256 767e135ee1f4ee16, retrieved 2026-10-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF