HC32L170JATH-LQ48

{
  "slug": "hc32l170jath-lq48",
  "version": "0.1.0",
  "type": "component",
  "description": "XHSC Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "hc32l170jath-lq48",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "hc32l170jath-lq48.kicad_sym",
    "hc32l170jath-lq48.kicad_mod",
    "hc32l170jath-lq48.glb",
    "hc32l170jath-lq48.step",
    "hc32l170jath-lq48.lbr",
    "docs/hero.png",
    "docs/hc32l170jath-lq48-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "hc32l170jath-lq48-hero.glb",
    "hc32l170jath-lq48-hero.overlay.json",
    "hc32l170jath-lq48-etched.glb"
  ],
  "component": {
    "mpn": "HC32L170JATH-LQ48",
    "manufacturer": "XHSC",
    "package": "LQFP-48(7x7)",
    "pin_count": 48,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835678121811968",
    "parts": {
      "symbol": "hc32l170jath-lq48.kicad_sym",
      "footprint": "hc32l170jath-lq48.kicad_mod",
      "model_3d": "hc32l170jath-lq48-hero.glb",
      "model_3d_plain": "hc32l170jath-lq48-etched.glb",
      "model_3d_step": "hc32l170jath-lq48-etched.step",
      "model_3d_step_plain": "hc32l170jath-lq48.step",
      "lbr": "hc32l170jath-lq48.lbr"
    },
    "distributor_links": {
      "lcsc": "C2904272"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T03:50:34Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VCAP",
        "type": "power_out",
        "description": "Internal LDO core-supply output for internal circuits only; it requires an external decoupling capacitor of at least 1 µF."
      },
      {
        "number": "2",
        "name": "PC13",
        "type": "bidirectional",
        "description": "General-purpose I/O PC13 with RTC_1HZ and TIM3_CH1B alternate functions, and LVD0 voltage-detection input."
      },
      {
        "number": "3",
        "name": "XTLI/PC14",
        "type": "bidirectional",
        "description": "Port PC14 that doubles as the low-speed crystal oscillator input XTLI for a 32.768 kHz crystal."
      },
      {
        "number": "4",
        "name": "XTLO/PC15",
        "type": "bidirectional",
        "description": "Port PC15 that doubles as the low-speed crystal oscillator output XTLO for a 32.768 kHz crystal."
      },
      {
        "number": "5",
        "name": "XTHI/PF00",
        "type": "bidirectional",
        "description": "Port PF00 that doubles as the high-speed crystal oscillator input XTHI for a 4-32 MHz crystal, with I2C0_SDA and UART1_TXD alternate functions."
      },
      {
        "number": "6",
        "name": "XTHO/PF01",
        "type": "bidirectional",
        "description": "Port PF01 that doubles as the high-speed crystal oscillator output XTHO for a 4-32 MHz crystal, with I2C0_SCL, TIM4_CHB and UART1_RXD alternate functions."
      },
      {
        "number": "7",
        "name": "RESETB",
        "type": "input",
        "description": "Reset input with CMOS Schmitt-trigger hysteresis of 200 mV and a non-disconnectable weak pull-up of about 80 kΩ; input pulses shorter than 100 ns are filtered."
      },
      {
        "number": "8",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground; it must be connected to the same ground system as DVSS."
      },
      {
        "number": "9",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply, operating range 1.8-5.5 V; it must be at the same voltage as DVCC and needs its own decoupling capacitor placed close to the pin."
      },
      {
        "number": "10",
        "name": "PA00",
        "type": "bidirectional",
        "description": "Port PA00 with UART1_CTS, LPUART1_TXD, TIM0_ETR, VC0_OUT, TIM1_CHA, TIM3_ETR and TIM0_CHA alternate functions, and ADC input AIN0."
      },
      {
        "number": "11",
        "name": "PA01",
        "type": "bidirectional",
        "description": "Port PA01 with UART1_RTS, LPUART1_RXD, TIM0_CHB, TIM1_ETR, TIM1_CHB, HCLK_OUT and SPI1_MOSI alternate functions, and ADC input AIN1."
      },
      {
        "number": "12",
        "name": "PA02",
        "type": "bidirectional",
        "description": "Port PA02 with UART1_TXD, TIM0_CHA, VC1_OUT, TIM1_CHA, TIM2_CHA, PCLK_OUT and SPI1_MISO alternate functions, and ADC input AIN2."
      },
      {
        "number": "13",
        "name": "PA03",
        "type": "bidirectional",
        "description": "Port PA03 with UART1_RXD, TIM0_GATE, TIM1_CHB, TIM2_CHB, SPI1_CS, TIM3_CH1A and TIM5_CHA alternate functions, and ADC input AIN3."
      },
      {
        "number": "14",
        "name": "PA04",
        "type": "bidirectional",
        "description": "Port PA04 with SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, TIM5_CHA, LVD_OUT and TIM3_CH2B alternate functions, and ADC input AIN4, DAC_OUT and OPA_OUT0 analog functions."
      },
      {
        "number": "15",
        "name": "PA05",
        "type": "bidirectional",
        "description": "Port PA05 with SPI0_SCK, TIM0_ETR, PCA_ECI, TIM0_CHA, TIM5_CHB, XTL_OUT and XTH_OUT alternate functions."
      },
      {
        "number": "16",
        "name": "PA06",
        "type": "bidirectional",
        "description": "Port PA06 with SPI0_MISO, PCA_CH0, TIM3_BK, TIM1_CHA, VC0_OUT, TIM3_GATE and LPUART0_CTS alternate functions."
      },
      {
        "number": "17",
        "name": "PA07",
        "type": "bidirectional",
        "description": "Port PA07 with SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, TIM2_CHA, VC1_OUT and TIM4_CHB alternate functions."
      },
      {
        "number": "18",
        "name": "PB00",
        "type": "bidirectional",
        "description": "Port PB00 with PCA_CH2, TIM3_CH1B, LPUART0_TXD, TIM5_CHB, RCH_OUT, RCL_OUT and PLL_OUT alternate functions, and ADC input AIN (per pin table)."
      },
      {
        "number": "19",
        "name": "PB01",
        "type": "bidirectional",
        "description": "Port PB01 with PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB, LPUART0_RTS, VC2_OUT and TCLK_OUT alternate functions."
      },
      {
        "number": "20",
        "name": "PB02",
        "type": "bidirectional",
        "description": "Port PB02 with LPTIM_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA, TIM1_BK, TIM0_BK and TIM2_BK alternate functions."
      },
      {
        "number": "21",
        "name": "PB10",
        "type": "bidirectional",
        "description": "Port PB10 with I2C1_SCL, SPI1_SCK, TIM1_CHA, LPUART0_TXD, TIM3_CH1A, LPUART1_RTS and UART1_RTS alternate functions."
      },
      {
        "number": "22",
        "name": "PB11",
        "type": "bidirectional",
        "description": "Port PB11 with I2C1_SDA, TIM1_CHB, LPUART0_RXD, TIM2_GATE, TIM6_CHA, LPUART1_CTS and UART1_CTS alternate functions."
      },
      {
        "number": "23",
        "name": "DVSS",
        "type": "power_in",
        "description": "Digital ground for the core and I/O; it must be connected to the system ground."
      },
      {
        "number": "24",
        "name": "DVCC",
        "type": "power_in",
        "description": "Digital supply, operating range 1.8-5.5 V, which must match AVCC and has a decoupling capacitor placed close to the pin."
      },
      {
        "number": "25",
        "name": "PB12",
        "type": "bidirectional",
        "description": "Port PB12 with SPI1_CS, TIM3_BK, LPUART0_TXD, TIM0_BK, LPUART0_RTS and TIM6_CHA alternate functions."
      },
      {
        "number": "26",
        "name": "PB13",
        "type": "bidirectional",
        "description": "Port PB13 with SPI1_SCK, I2C1_SCL, TIM3_CH0B, LPUART0_CTS, TIM1_CHA, TIM1_GATE and TIM6_CHB alternate functions."
      },
      {
        "number": "27",
        "name": "PB14",
        "type": "bidirectional",
        "description": "Port PB14 with SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, RTC_1HZ, LPUART0_RTS and TIM1_BK alternate functions."
      },
      {
        "number": "28",
        "name": "PB15",
        "type": "bidirectional",
        "description": "Port PB15 with SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE and LPUART1_RXD alternate functions."
      },
      {
        "number": "29",
        "name": "PA08",
        "type": "bidirectional",
        "description": "Port PA08 with UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA and TIM3_BK alternate functions."
      },
      {
        "number": "30",
        "name": "PA09",
        "type": "bidirectional",
        "description": "Port PA09 with UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT and TIM5_CHA alternate functions."
      },
      {
        "number": "31",
        "name": "PA10",
        "type": "bidirectional",
        "description": "Port PA10 with UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT and TIM6_CHA alternate functions."
      },
      {
        "number": "32",
        "name": "PA11",
        "type": "bidirectional",
        "description": "Port PA11 with UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT, SPI0_MISO and TIM4_CHB alternate functions."
      },
      {
        "number": "33",
        "name": "PA12",
        "type": "bidirectional",
        "description": "Port PA12 with UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI and PCNT_S0 alternate functions."
      },
      {
        "number": "34",
        "name": "PA13/SWDIO",
        "type": "bidirectional",
        "description": "Port PA13 that serves as the SWD debug data pin SWDIO, with IR_OUT, UART0_RXD, LVD_OUT, TIM3_ETR, RTC_1HZ, PCNT_S1 and VC2_OUT alternate functions."
      },
      {
        "number": "35",
        "name": "PF06",
        "type": "bidirectional",
        "description": "Port PF06 with I2C1_SCL, LPUART1_CTS and UART0_CTS alternate functions."
      },
      {
        "number": "36",
        "name": "PF07",
        "type": "bidirectional",
        "description": "Port PF07 with I2C1_SDA, LPUART1_RTS and UART0_RTS alternate functions."
      },
      {
        "number": "37",
        "name": "PA14/SWCLK",
        "type": "bidirectional",
        "description": "Port PA14 that serves as the SWD debug clock pin SWCLK, with UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT and PLL_OUT alternate functions."
      },
      {
        "number": "38",
        "name": "PA15",
        "type": "bidirectional",
        "description": "Port PA15 with SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA and TIM3_CH1A alternate functions."
      },
      {
        "number": "39",
        "name": "PB03",
        "type": "bidirectional",
        "description": "Port PB03 with SPI0_SCK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, LPTIM_GATE, XTL_OUT and XTH_OUT alternate functions."
      },
      {
        "number": "40",
        "name": "PB04",
        "type": "bidirectional",
        "description": "Port PB04 with SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B and LPTIM_ETR alternate functions."
      },
      {
        "number": "41",
        "name": "PB05",
        "type": "bidirectional",
        "description": "Port PB05 with SPI0_MOSI, TIM1_BK, PCA_CH1, LPTIM_GATE, PCNT_S0 and UART0_RTS alternate functions."
      },
      {
        "number": "42",
        "name": "PB06",
        "type": "bidirectional",
        "description": "Port PB06 with I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, LPTIM_ETR, TIM3_CH0A and LPTIM_TOG alternate functions."
      },
      {
        "number": "43",
        "name": "PB07",
        "type": "bidirectional",
        "description": "Port PB07 with I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS, TIM0_CHB, LPTIM_TOGN and PCNT_S1 alternate functions."
      },
      {
        "number": "44",
        "name": "BOOT0",
        "type": "input",
        "description": "Boot-mode pin sampled at reset: high selects ISP programming mode, and low selects user mode, which runs Flash code and allows SWD programming."
      },
      {
        "number": "45",
        "name": "PB08",
        "type": "bidirectional",
        "description": "Port PB08 with I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A and UART0_TXD alternate functions."
      },
      {
        "number": "46",
        "name": "PB09",
        "type": "bidirectional",
        "description": "Port PB09 with I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, TIM2_CHB and UART0_RXD alternate functions."
      },
      {
        "number": "47",
        "name": "DVSS",
        "type": "power_in",
        "description": "Digital ground for the core and I/O; it must be connected to the system ground."
      },
      {
        "number": "48",
        "name": "DVCC",
        "type": "power_in",
        "description": "Digital supply, operating range 1.8-5.5 V, which must match AVCC and has a decoupling capacitor placed close to the pin."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: MPN mismatch: the request is HC32L170JATH-LQ48, but the datasheet lists HC32L170JATA-LQ48 (and HC32L; The HC32L176JATA-LQ48 pinout (page 26) is a different variant with SEG/COM LCD functions on several ; The text says BOOT0 is PF11 (pages 19 and 42), but the LQFP-48 diagram labels pin 44 as BOOT0 and no",
          "18/48 pins cited to the wrong page (name found elsewhere): ['10:PA00@p39', '11:PA01@p39', '12:PA02@p39', '13:PA03@p39']"
        ],
        "pages_sent": 51,
        "cost_usd": 0.2409,
        "at": "2026-10-18T03:47:57"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835678121811968",
        "pages": 98,
        "sha256": "6c88b764c7b2ca0d",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "hc32l170jath-lq48.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "hc32l170jath-lq48-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "a17ca5e41d37a85951093aa6cf9ee0371eba429ac82fc96bcb865142c4c9871d",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}