component
HC32F002C4PZ-TSSOP20TR
Public Made by Adomby adom
XHSC Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "hc32f002c4pz-tssop20tr",
"version": "0.1.0",
"type": "component",
"description": "XHSC Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"hc32f002c4pz-tssop20tr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"hc32f002c4pz-tssop20tr.kicad_sym",
"hc32f002c4pz-tssop20tr.kicad_mod",
"hc32f002c4pz-tssop20tr.glb",
"hc32f002c4pz-tssop20tr.step",
"hc32f002c4pz-tssop20tr.lbr",
"docs/hero.png",
"docs/hc32f002c4pz-tssop20tr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"hc32f002c4pz-tssop20tr-hero.glb",
"hc32f002c4pz-tssop20tr-hero.overlay.json"
],
"component": {
"mpn": "HC32F002C4PZ-TSSOP20TR",
"manufacturer": "XHSC",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905276105515008",
"parts": {
"symbol": "hc32f002c4pz-tssop20tr.kicad_sym",
"footprint": "hc32f002c4pz-tssop20tr.kicad_mod",
"model_3d": "hc32f002c4pz-tssop20tr-hero.glb",
"model_3d_plain": "hc32f002c4pz-tssop20tr.glb",
"model_3d_step": "hc32f002c4pz-tssop20tr-etched.step",
"model_3d_step_plain": "hc32f002c4pz-tssop20tr.step",
"lbr": "hc32f002c4pz-tssop20tr.lbr"
},
"distributor_links": {
"lcsc": "C5907210"
},
"distributor_check": {
"checked_at": "2026-10-10T01:02:41Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "PD04/AIN4/LVDIN2",
"type": "bidirectional",
"description": "Port PD04 with ADC input AIN4, LVD monitor input LVD_IN2, and alternate functions GTIM_CH0, LPUART1_TXD and SPI_SCK; the ADC input range is 0 to Vref."
},
{
"number": "2",
"name": "PD05/AIN5",
"type": "bidirectional",
"description": "Port PD05 with ADC input AIN5 and alternate functions LPUART1_TXD, ATIM3_CH0A and SPI_MISO; the ADC input range is 0 to Vref."
},
{
"number": "3",
"name": "PD06/AIN6",
"type": "bidirectional",
"description": "Port PD06 with ADC input AIN6 and alternate functions LPUART1_RXD, GTIM_ETR and SPI_MOSI; the ADC input range is 0 to Vref."
},
{
"number": "4",
"name": "RESETB/PA00",
"type": "input",
"description": "Active-low reset input (CMOS, with a non-disconnectable weak pull-up of about 80 kΩ) that is also port PA00; the datasheet specifies VIH 0.7VCC to VCC+0.3 V and VIL -0.3 to 0.3VCC V, with a 3 µs filtered-pulse width."
},
{
"number": "5",
"name": "AIN7/PA01",
"type": "bidirectional",
"description": "Port PA01 with ADC input AIN7 and alternate functions LPUART0_RXD, I2C_SDA, GTIM_TOGP, HCLK_OUT and EXTCLK (external clock input, 1 to 16 MHz); the ADC input range is 0 to Vref."
},
{
"number": "6",
"name": "AIN8/PA02",
"type": "bidirectional",
"description": "Port PA02 with ADC input AIN8 and alternate functions LPUART0_TXD, I2C_SCL, GTIM_TOGN and LVD_OUT; the ADC input range is 0 to Vref."
},
{
"number": "7",
"name": "AVSS/DVSS",
"type": "power_in",
"description": "Analog and digital ground; all ground pins must be kept within 50 mV of each other, and the pin must be connected to the external supply system."
},
{
"number": "8",
"name": "PA04",
"type": "bidirectional",
"description": "General-purpose I/O port PA04 with alternate functions GTIM_TOGP, LVD_OUT and SPI_NSS."
},
{
"number": "9",
"name": "AVCC/DVCC",
"type": "power_in",
"description": "Analog and digital supply, 1.7 to 5.5 V; AVCC should be the same supply as DVCC, with no more than 300 mV difference during power-up and normal operation, and a decoupling capacitor placed close to the pin."
},
{
"number": "10",
"name": "LVDIN0/PA03",
"type": "bidirectional",
"description": "Port PA03 with LVD monitor input LVD_IN0 and alternate functions GTIM_CH2, SPI_NSS, CTRIM_ETR and CTRIM_TOG."
},
{
"number": "11",
"name": "PB05/AIN9",
"type": "bidirectional",
"description": "Port PB05 with ADC input AIN9 and alternate functions I2C_SDA, ATIM3_BK, CTRIM_ETR and CTRIM_TOG; this pin is a higher-drive port on the TSSOP20 package."
},
{
"number": "12",
"name": "PB04/AIN10",
"type": "bidirectional",
"description": "Port PB04 with ADC input AIN10 and alternate functions I2C_SCL, ATIM3_CH2B and LPUART0_CTS; this pin is a higher-drive port on the TSSOP20 package."
},
{
"number": "13",
"name": "PC03/LVDIN1/ExRef",
"type": "bidirectional",
"description": "Port PC03 with LVD monitor input LVD_IN1, ADC external reference input ExRef, and alternate functions ATIM3_CH2A, ATIM3_CH0B and LPUART0_RTS; this pin is a higher-drive port on the TSSOP20 package."
},
{
"number": "14",
"name": "PC04/AIN0",
"type": "bidirectional",
"description": "Port PC04 with ADC input AIN0 and alternate functions ATIM3_CH0B, ATIM3_CH1B and TCLK_OUT."
},
{
"number": "15",
"name": "PC05",
"type": "bidirectional",
"description": "General-purpose I/O port PC05 with alternate functions SPI_SCK, GTIM_CH3 and ATIM3_ETR; it has no ADC function on this package."
},
{
"number": "16",
"name": "PC06/AIN1",
"type": "bidirectional",
"description": "Port PC06 with ADC input AIN1 and alternate functions SPI_MOSI, ATIM3_CH0A and LPUART1_RTS."
},
{
"number": "17",
"name": "PC07/SWDIO",
"type": "bidirectional",
"description": "Port PC07 used as the SWD data pin (SWDIO) with alternate functions SPI_MISO, ATIM3_CH1A and LPUART0_RXD."
},
{
"number": "18",
"name": "PD01/SWCLK",
"type": "input",
"description": "Port PD01 used as the SWD clock pin (SWCLK) with alternate functions GTIM_ETR, ATIM3_BK and LPUART0_TXD."
},
{
"number": "19",
"name": "PD02/AIN2",
"type": "bidirectional",
"description": "Port PD02 with ADC input AIN2 and alternate functions GTIM_CH2, ATIM3_CH2A and LPUART1_CTS."
},
{
"number": "20",
"name": "PD03/AIN3",
"type": "bidirectional",
"description": "Port PD03 with ADC input AIN3 and alternate functions GTIM_CH1, ATIM3_CH1A and LPUART1_RXD."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin-to-name mapping for the TSSOP20 variant is taken from the TSSOP20 figure on page 17 and cross-ch; Pin types are inferred from the datasheet: GPIO/multiplexed pins are marked bidirectional, RESETB (p; Per the datasheet note, GPIOs not brought out on the 20-pin package (PB00, PB01, PB02, PB03) are not"
],
"pages_sent": 50,
"cost_usd": 0.1672,
"at": "2026-10-10T01:00:30"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905276105515008",
"pages": 60,
"sha256": "0ec87a609d962332",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "hc32f002c4pz-tssop20tr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "hc32f002c4pz-tssop20tr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "1193ad79c15a176bd9e04573f465591ed91073ba357b52d04b8e0379f5c25369",
"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}