# GD5F1GQ5REYIGR

**GigaDevice Semicon Beijing** · NAND FLASH · WSON-8-EP(6x8)

GD5F1GQ5REYIGR from GigaDevice Semicon Beijing, in a WSON-8-EP(6x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip Select input, active low; device enters idle state when CS# is HIGH; recommended to pull HIGH when SPI flash is not in use to avoid device remaining in read state. |
| 2 | SO/SIO1 | bidirectional | Serial Data Output in Standard SPI mode; Serial Data Input Output 1 (bidirectional) in Dual SPI (3BH/BBH) and Quad SPI (6BH/EBH/EEH) modes. |
| 3 | WP#/SIO2 | bidirectional | Write Protect input, active low; when BRWD=1 and WP# is LOW the block protect bits and Protection register (A0H) cannot be changed; functions as Serial Data Input Output 2 in Quad SPI mode when QE=1. |
| 4 | VSS | power_in | Ground reference for all internal circuitry; 0 V. |
| 5 | HOLD#/SIO3 | bidirectional | Hold input, active low, suspends serial communications while CS# is held low without aborting an in-progress write, program, or erase; available only when QE=0; functions as Serial Data Input Output 3 in Quad SPI mode when QE=1. |
| 6 | SI/SIO0 | bidirectional | Serial Data Input in Standard SPI mode, data latched on rising edge of SCLK; Serial Data Input Output 0 (bidirectional) in Dual and Quad SPI modes. |
| 7 | SCLK | input | Serial Clock input; supports CPOL=0/CPHA=0 (Mode 0) and CPOL=1/CPHA=1 (Mode 3); maximum frequency 133 MHz at 3.3 V (30 pF load), 104 MHz at 1.8 V (30 pF load). |
| 8 | VCC | power_in | Power Supply; 1.7 V to 2.0 V for R (1.8 V) variant; 30 mA maximum active current (read/program/erase), 50 µA maximum standby current. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | GigaDevice Semicon Beijing |
| Package | WSON-8-EP(6x8) |
| Category | Memory |
| Pins | 9 |

## CAD (KiCad official)

- Symbol: `GD5F1GQ5REYIGR`
- Footprint: `Package_SON:WSON-8-1EP_8x6mm_P1.27mm_EP3.4x4.3mm`
- 3D model: WSON-8-EP(6x8), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `gd5f1gq5reyigr-etched.step` / `gd5f1gq5reyigr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gd5f1gq5reyigr.step` / `gd5f1gq5reyigr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [GigaDevice Semicon Beijing datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589042092094205952) (64 pp, sha256 `404058e4ae70989a`, retrieved 2026-10-01, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/gd5f1gq5reyigr-datasheet.pdf)