# GD32F130K6T6

**GigaDevice Semicon Beijing** · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-32(7x7)

GD32F130K6T6 from GigaDevice Semicon Beijing, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Digital power supply pin. |
| 2 | PF0-OSCIN | bidirectional | 5 V tolerant I/O, default PF0, additional function OSCIN (HXTAL oscillator input). |
| 3 | PF1-OSCOUT | bidirectional | 5 V tolerant I/O, default PF1, additional function OSCOUT (HXTAL oscillator output). |
| 4 | NRST | bidirectional | External reset pin, default function NRST. |
| 5 | VDDA | power_in | Analog power supply pin. |
| 6 | PA0-WKUP | bidirectional | I/O, default PA0; alternate USART1_CTS, TIMER1_CH0, TIMER1_ETI; additional ADC_IN0, RTC_TAMP1, WKUP0. |
| 7 | PA1 | bidirectional | I/O, default PA1; alternate USART1_RTS/USART1_DE, TIMER1_CH1, EVENTOUT; additional ADC_IN1. |
| 8 | PA2 | bidirectional | I/O, default PA2; alternate USART1_TX, TIMER1_CH2, TIMER14_CH0; additional ADC_IN2. |
| 9 | PA3 | bidirectional | I/O, default PA3; alternate USART1_RX, TIMER1_CH3, TIMER14_CH1; additional ADC_IN3. |
| 10 | PA4 | bidirectional | I/O, default PA4; alternate SPI0_NSS, USART1_CK, TIMER13_CH0; additional ADC_IN4. |
| 11 | PA5 | bidirectional | I/O, default PA5; alternate SPI0_SCK, TIMER1_CH0, TIMER1_ETI; additional ADC_IN5. |
| 12 | PA6 | bidirectional | I/O, default PA6; alternate SPI0_MISO, TIMER2_CH0, TIMER0_BRKIN, TIMER15_CH0, EVENTOUT; additional ADC_IN6. |
| 13 | PA7 | bidirectional | I/O, default PA7; alternate SPI0_MOSI, TIMER2_CH1, TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0, EVENTOUT; additional ADC_IN7. |
| 14 | PB0 | bidirectional | I/O, default PB0; alternate TIMER2_CH2, TIMER0_CH1_ON, USART1_RX, EVENTOUT; additional ADC_IN8. |
| 15 | PB1 | bidirectional | I/O, default PB1; alternate TIMER2_CH3, TIMER13_CH0, TIMER0_CH2_ON; additional ADC_IN9. |
| 16 | VSS | power_in | Digital ground pin. |
| 17 | VDD | power_in | Digital power supply pin. |
| 18 | PA8 | bidirectional | 5 V tolerant I/O, default PA8; alternate USART0_CK, TIMER0_CH0, CK_OUT, USART1_TX, EVENTOUT. |
| 19 | PA9 | bidirectional | 5 V tolerant I/O, default PA9; alternate USART0_TX, TIMER0_CH1, TIMER14_BRKIN, I2C0_SCL. |
| 20 | PA10 | bidirectional | 5 V tolerant I/O, default PA10; alternate USART0_RX, TIMER0_CH2, TIMER16_BRKIN, I2C0_SDA. |
| 21 | PA11 | bidirectional | 5 V tolerant I/O, default PA11; alternate USART0_CTS, TIMER0_CH3, EVENTOUT. |
| 22 | PA12 | bidirectional | 5 V tolerant I/O, default PA12; alternate USART0_RTS/USART0_DE, TIMER0_ETI, EVENTOUT. |
| 23 | PA13 | bidirectional | 5 V tolerant I/O, default PA13; alternate IFRP_OUT, SWDIO. |
| 24 | PA14 | bidirectional | 5 V tolerant I/O, default PA14; alternate USART1_TX, SWCLK. |
| 25 | PA15 | bidirectional | 5 V tolerant I/O, default PA15; alternate SPI0_NSS, USART1_RX, TIMER1_CH0, TIMER1_ETI, EVENTOUT. |
| 26 | PB3 | bidirectional | 5 V tolerant I/O, default PB3; alternate SPI0_SCK, TIMER1_CH1, EVENTOUT. |
| 27 | PB4 | bidirectional | 5 V tolerant I/O, default PB4; alternate SPI0_MISO, TIMER2_CH0, EVENTOUT. |
| 28 | PB5 | bidirectional | 5 V tolerant I/O, default PB5; alternate SPI0_MOSI, I2C0_SMBA, TIMER15_BRKIN, TIMER2_CH1. |
| 29 | PB6 | bidirectional | 5 V tolerant I/O, default PB6; alternate I2C0_SCL, USART0_TX, TIMER15_CH0_ON. |
| 30 | PB7 | bidirectional | 5 V tolerant I/O, default PB7; alternate I2C0_SDA, USART0_RX, TIMER16_CH0_ON. |
| 31 | BOOT0 | input | Boot mode selection input, default function BOOT0. |
| 32 | VSS | power_in | Digital ground pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | GigaDevice Semicon Beijing |
| Package | LQFP-32(7x7) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 32 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | 2.6 | 3.3 | 3.6 | V |  | 45 |
| Analog supply voltage | VDDA | 2.6 | 3.3 | 3.6 | V | Same as VDD | 45 |
| Battery supply voltage | VBAT | 1.8 |  | 3.6 | V |  | 45 |
| External voltage range | VDD | -0.3 |  | 3.6 | V | VSS - 0.3 to VSS + 3.6 | 44 |
| External analog supply voltage | VDDA | -0.3 |  | 3.6 | V | VSSA - 0.3 to VSSA + 3.6 | 44 |
| External battery supply voltage | VBAT | -0.3 |  | 3.6 | V | VSS - 0.3 to VSS + 3.6 | 44 |
| Input voltage on 5V tolerant pin | VIN | -0.3 |  | 4 | V | VSS - 0.3 to VDD + 4.0; cannot exceed 5.5 V | 44 |
| Input voltage on other I/O | VIN | -0.3 |  | 4 | V | VSS - 0.3 to 4.0 | 44 |
| Variations between different VDD power pins | /ΔVDDX/ |  |  | 50 | mV |  | 44 |
| Variations between different ground pins | /VSSX −VSS/ |  |  | 50 | mV |  | 44 |
| Maximum current for GPIO pins | IIO | -25 |  | 25 | mA |  | 44 |
| Operating temperature range | TA | -40 |  | 85 | °C |  | 44 |
| Power dissipation of LQFP32 | PD |  |  | 605 | mW | TA = 85°C | 44 |
| Storage temperature range | TSTG | -55 |  | 150 | °C |  | 44 |
| Maximum junction temperature | TJ |  |  | 125 | °C |  | 44 |
| AHB1 clock frequency | fHCLK1 |  |  | 48 | MHz |  | 45 |
| AHB2 clock frequency | fHCLK2 |  |  | 48 | MHz |  | 45 |
| APB1 clock frequency | fAPB1 |  |  | 48 | MHz |  | 45 |
| APB2 clock frequency | fAPB2 |  |  | 48 | MHz |  | 45 |
| VDD fall time rate | tVDD | 20 |  |  | μs/v | VDD fall time rate | 45 |
| Supply current (Deep-sleep mode) | IDD + IDDA |  | 263 | 1100 | μA | VDD= VDDA =3.3V, Regulator in run mode, IRC40K off, RTC off | 47 |
| Supply current (Standby mode) | IDD + IDDA |  | 5.5 | 27.5 | μA | VDD= VDDA =3.3V, LXTAL off, IRC40K off, RTC off | 47 |
| Supply current (Run mode) | IDD + IDDA |  | 18.5 |  | mA | VDD=VDDA=3.3V, HXTAL=8MHz, System clock=48 MHz, All peripherals enabled | 46 |
| HBM ESD voltage | VESD(HBM) |  |  | 5000 | V | TA=25 °C; JS-001-2014 | 52 |
| CDM ESD voltage | VESD(CDM) |  |  | 500 | V | TA=25 °C; JS-002-2014 | 52 |
| Latch-up I-test | LU | -100 |  | 100 | mA | TA=25 °C; JESD78 | 52 |
| Latch-up Vsupply over voltage | Vsupply |  |  | 5.4 | V | TA=25 °C; JESD78 | 52 |
| Crystal or ceramic frequency | fHXTAL | 4 | 8 | 32 | MHz | VDD=3.3V | 52 |
| HXTAL matching capacitance | CHXTAL |  | 20 | 30 | pF |  | 52 |
| HXTAL duty cycle | Ducy(HXTAL) | 30 | 50 | 70 | % |  | 52 |
| External clock frequency (HXTAL bypass) | fHXTAL_ext | 1 |  | 50 | MHz | VDD = 3.3 V | 53 |
| IRC8M accuracy, factory-trimmed | ACCIRC8M | -1 |  | 1 | % | VDD=VVDDA =3.3V, TA=25°C | 54 |
| IRC8M operating current | IDDIRC8M+IDDAIRC8M |  | 39 | 100 | μA | VDD=VVDDA =3.3V, fIRC8M=8MHz | 54 |
| IRC14M accuracy, factory-trimmed | ACCIRC14M | -1 |  | 1 | % | VDD=VCDDA =3.3V, TA=25°C | 55 |
| PLL input clock frequency | fPLLIN | 1 |  | 25 | MHz |  | 55 |
| PLL output clock frequency | fPLLOUT | 16 |  | 72 | MHz |  | 55 |
| PLL lock time | tLOCK |  |  | 300 | μs |  | 55 |
| Flash endurance | PECYC | 100 |  |  | kcycles | TA = -40 °C ~ +85 °C | 56 |
| Word programming time | tPROG |  | 37.5 | 105 | μs | TA = -40°C ~ +85 °C | 56 |
| Page erase time | tERASE |  | 50 | 400 | ms | TA = -40°C ~ +85 °C | 56 |
| Mass erase time (32K) | tMERASE(32K) |  | 0.6 | 6 | s | TA = -40°C ~ +85 °C | 56 |
| NRST input low level voltage | VIL(NRST) | -0.3 |  | 0.3 | V | VDD = VDDA = 3.3 V; max printed as 0.3 VDD | 56 |
| NRST input high level voltage | VIH(NRST) | 0.7 |  |  | V | VDD = VDDA = 3.3 V; min printed 0.7 VDD, max VDD + 0.3 | 56 |
| Standard IO low level input voltage | VIL |  |  | 0.3 | V | 2.6 V ≤ VDD = VDDA ≤ 3.3 V; printed 0.3 VDD | 57 |
| Standard IO high level input voltage | VIH | 0.7 |  |  | V | 2.6 V ≤ VDD = VDDA ≤ 3.3 V; printed 0.7 VDD | 57 |
| ADC operating voltage | VDDA | 2.6 | 3.3 | 3.6 | V |  | 59 |
| ADC clock | fADC | 0.6 |  | 14 | MHz |  | 59 |
| ADC sampling rate | fS | 0.04 |  | 1 | MSPS | 12-bit | 59 |
| ADC external input impedance | RAIN |  |  | 54.8 | kΩ | See Equation 1 | 59 |
| ADC sampling time | ts | 0.11 |  | 17.11 | μs | fADC = 14 MHz | 59 |
| Thermal resistance junction-to-ambient LQFP32 | θJA |  | 66.11 |  | °C/W | Natural convection, 2S2P PCB | 75 |
| Thermal resistance junction-to-case LQFP32 | θJC |  | 30.06 |  | °C/W | Cold plate, 2S2P PCB | 76 |

## CAD (KiCad official)

- Symbol: `GD32F130K6T6`
- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`
- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files: `gd32f130k6t6-etched.step` / `gd32f130k6t6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gd32f130k6t6.step` / `gd32f130k6t6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [GigaDevice Semicon Beijing datasheet](docs/gd32f130k6t6-datasheet.pdf) (81 pp, sha256 `9e5f1a95f4b104c0`, retrieved 2026-10-24, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/gd32f130k6t6-datasheet.pdf)