component
GC1808
Public Made by Adomby adom
SX-globalchip Analog To Digital Converters (ADCs), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "gc1808",
"title": "GC1808",
"brief": "SX-globalchip Analog To Digital Converters (ADCs), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"adc-dac-data conversion",
"gc1808",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "GC1808",
"manufacturer": "SX-globalchip",
"package": "TSSOP-14",
"pin_count": 14,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Analog To Digital Converters (ADCs)",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/e1ce0ec87b4e1b8e4ee91c67f98570ce.pdf",
"parts": {
"symbol": "gc1808.kicad_sym",
"footprint": "gc1808.kicad_mod",
"model_3d": "gc1808-hero.glb",
"model_3d_plain": "gc1808-etched.glb",
"model_3d_step": "gc1808-etched.step",
"model_3d_step_plain": "gc1808.step",
"lbr": "gc1808.lbr"
},
"distributor_links": {
"lcsc": "C16197185"
},
"distributor_check": {
"checked_at": "2026-11-05T04:25:50Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "VREF",
"type": "power_in",
"description": "Reference voltage decoupling pin; the central voltage VREF is 0.5 VCC per the datasheet."
},
{
"number": "2",
"name": "AGND",
"type": "power_in",
"description": "Analog ground, referenced to 0 V with a tolerance of ±0.1 V relative to DGND."
},
{
"number": "3",
"name": "VCC",
"type": "power_in",
"description": "Analog supply, recommended 4.5 V to 5.5 V (typical 5 V) with an absolute maximum of 6.5 V."
},
{
"number": "4",
"name": "VDD",
"type": "power_in",
"description": "Digital supply, recommended 2.7 V to 3.6 V (typical 3.3 V) with an absolute maximum of 4 V."
},
{
"number": "5",
"name": "DGND",
"type": "power_in",
"description": "Digital ground, referenced to 0 V with a tolerance of ±0.1 V relative to AGND."
},
{
"number": "6",
"name": "SCKI",
"type": "input",
"description": "System clock input at 256 fS, 384 fS or 512 fS, with a range of 2.048 MHz to 49.152 MHz."
},
{
"number": "7",
"name": "LRCK",
"type": "bidirectional",
"description": "Audio data latch enable (word clock), an output in master mode and an input in slave mode that must be synchronous with SCKI."
},
{
"number": "8",
"name": "BCK",
"type": "bidirectional",
"description": "Audio bit clock, an output in master mode with 64 BCK per frame and an input in slave mode."
},
{
"number": "9",
"name": "DOUT",
"type": "output",
"description": "Digital audio data output, with a specified load capacitance of 20 pF maximum in the recommended conditions."
},
{
"number": "10",
"name": "MD0",
"type": "input",
"description": "Audio interface mode select 0, which together with MD1 selects master or slave mode and must be set before power-up."
},
{
"number": "11",
"name": "MD1",
"type": "input",
"description": "Audio interface mode select 1, which together with MD0 selects master or slave mode and must be set before power-up."
},
{
"number": "12",
"name": "FMT",
"type": "input",
"description": "Audio format select that switches between I2S and left-justified data formats, controllable by external GPIO or pull-up/pull-down resistors."
},
{
"number": "13",
"name": "VINL",
"type": "input",
"description": "Analog left channel input, single-ended with 3 Vp-p full scale at VCC = 5 V and an input impedance of 60 kΩ."
},
{
"number": "14",
"name": "VINR",
"type": "input",
"description": "Analog right channel input, single-ended with 3 Vp-p full scale at VCC = 5 V and an input impedance of 60 kΩ."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet gives only one package, TSSOP14, and its pin table (page 3) lists 14 pins by number an"
],
"pages_sent": 17,
"cost_usd": 0.0165,
"at": "2026-11-05T04:25:41"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/e1ce0ec87b4e1b8e4ee91c67f98570ce.pdf",
"pages": 17,
"sha256": "775a3ac8deabe157",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "gc1808.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
5,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "gc1808-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
5,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "4c351546d3cda0c6b70abf37452e40268071b9cbcfaef227e6a4eb3e840c853e",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "SX-globalchip",
"Package": "TSSOP-14",
"Category": "ADC/DAC/Data Conversion",
"Pins": "14"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "775a3ac8deabe1577721584239cb3e55bb40278a009cde359f580fd545f3883a",
"rows": [
{
"name": "Analog supply voltage VCC",
"symbol": "VCC",
"kind": "recommended_operating",
"unit": "V",
"min": 4.5,
"typ": 5,
"max": 5.5,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Digital supply voltage VDD",
"symbol": "VDD",
"kind": "recommended_operating",
"unit": "V",
"min": 2.7,
"typ": 3.3,
"max": 3.6,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "System clock frequency",
"symbol": "",
"kind": "recommended_operating",
"unit": "MHz",
"min": 2.048,
"typ": null,
"max": 49.152,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Digital sampling clock",
"symbol": "fS",
"kind": "recommended_operating",
"unit": "kHz",
"min": 8,
"typ": null,
"max": 96,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Analog supply voltage VCC absolute",
"symbol": "VCC",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": 5,
"max": 6.5,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Digital supply voltage VDD absolute",
"symbol": "VDD",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": 3.3,
"max": 4,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Digital input voltage SCKI, MD0, MD1, FMT",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 6.5,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Operating temperature TA (commercial grade)",
"symbol": "TA",
"kind": "absolute_maximum",
"unit": "C",
"min": -10,
"typ": null,
"max": 70,
"conditions": "commercial grade",
"source_page": 4,
"source": "datasheet"
},
{
"name": "ESD HBM",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -4000,
"typ": null,
"max": 4000,
"conditions": "HBM",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Sampling frequency fS",
"symbol": "fS",
"kind": "electrical",
"unit": "kHz",
"min": 8,
"typ": 48,
"max": 96,
"conditions": "",
"source_page": 5,
"source": "datasheet"
},
{
"name": "System clock frequency 256 fS",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": 2.048,
"typ": 12.288,
"max": 24.576,
"conditions": "256 fS",
"source_page": 5,
"source": "datasheet"
},
{
"name": "System clock frequency 384 fS",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": 3.072,
"typ": 18.432,
"max": 36.864,
"conditions": "384 fS",
"source_page": 5,
"source": "datasheet"
},
{
"name": "System clock frequency 512 fS",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": 4.096,
"typ": 24.576,
"max": 49.152,
"conditions": "512 fS",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Digital logic input low VIL",
"symbol": "VIL",
"kind": "electrical",
"unit": "VDC",
"min": 0,
"typ": null,
"max": 0.8,
"conditions": "",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Analog logic input high VIH",
"symbol": "VIH",
"kind": "electrical",
"unit": "VDC",
"min": 2,
"typ": null,
"max": 5.5,
"conditions": "",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Analog logic input low VIL",
"symbol": "VIL",
"kind": "electrical",
"unit": "VDC",
"min": 0,
"typ": null,
"max": 0.8,
"conditions": "",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Digital high-level input current IIH",
"symbol": "IIH",
"kind": "electrical",
"unit": "µA",
"min": -10,
"typ": null,
"max": 10,
"conditions": "VIN = VDD",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Digital low-level input current IIL",
"symbol": "IIL",
"kind": "electrical",
"unit": "µA",
"min": -10,
"typ": null,
"max": 10,
"conditions": "V = 0 V",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Analog high-level input current IIH",
"symbol": "IIH",
"kind": "electrical",
"unit": "µA",
"min": null,
"typ": 65,
"max": 100,
"conditions": "VIN = VDD",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Analog low-level input current IIL",
"symbol": "IIL",
"kind": "electrical",
"unit": "µA",
"min": -10,
"typ": null,
"max": 10,
"conditions": "VIN = 0 V",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Logic output high VOH",
"symbol": "VOH",
"kind": "electrical",
"unit": "VDC",
"min": 2.8,
"typ": null,
"max": null,
"conditions": "IOUT=–4mA",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Logic output low VOL",
"symbol": "VOL",
"kind": "electrical",
"unit": "VDC",
"min": null,
"typ": null,
"max": 0.5,
"conditions": "IOUT = 4 mA",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Channel gain mismatch",
"symbol": "",
"kind": "electrical",
"unit": "% of FSR",
"min": -3,
"typ": 1,
"max": 3,
"conditions": "",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Gain error",
"symbol": "",
"kind": "electrical",
"unit": "% of FSR",
"min": -6,
"typ": 3,
"max": 6,
"conditions": "",
"source_page": 5,
"source": "datasheet"
},
{
"name": "THD+N",
"symbol": "THD+N",
"kind": "electrical",
"unit": "dB",
"min": null,
"typ": -93,
"max": -87,
"conditions": "VIN=–0.5 dB, fs = 48 kHz",
"source_page": 5,
"source": "datasheet"
},
{
"name": "THD+N",
"symbol": "THD+N",
"kind": "electrical",
"unit": "dB",
"min": null,
"typ": null,
"max": -87,
"conditions": "VIN=–0.5 dB, fs = 96 kHz",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Dynamic range",
"symbol": "",
"kind": "electrical",
"unit": "dB",
"min": 95,
"typ": 99,
"max": null,
"conditions": "fs = 48 kHz, A-weighted",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Signal-to-noise ratio S/N",
"symbol": "S/N",
"kind": "electrical",
"unit": "dB",
"min": 95,
"typ": 99,
"max": null,
"conditions": "fs = 48 kHz, A-weighted",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Channel isolation",
"symbol": "",
"kind": "electrical",
"unit": "dB",
"min": 93,
"typ": 97,
"max": null,
"conditions": "fs = 48 kHz",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Digital filter passband ripple",
"symbol": "",
"kind": "electrical",
"unit": "dB",
"min": -0.05,
"typ": null,
"max": 0.05,
"conditions": "",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Analog supply current GCC",
"symbol": "GCC",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 8.6,
"max": 11,
"conditions": "fs = 48kHz, 96 kHz",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Digital supply current IDD",
"symbol": "IDD",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 5.9,
"max": 8,
"conditions": "fs = 48 kHz",
"source_page": 6,
"source": "datasheet"
},
{
"name": "System clock duty cycle",
"symbol": "",
"kind": "timing",
"unit": "%",
"min": 40,
"typ": null,
"max": 60,
"conditions": "",
"source_page": 7,
"source": "datasheet"
},
{
"name": "SCKI high-level time tw(SCKH)",
"symbol": "tw(SCKH)",
"kind": "timing",
"unit": "ns",
"min": 8,
"typ": null,
"max": null,
"conditions": "",
"source_page": 7,
"source": "datasheet"
},
{
"name": "SCKI low-level time tw(SCKL)",
"symbol": "tw(SCKL)",
"kind": "timing",
"unit": "ns",
"min": 8,
"typ": null,
"max": null,
"conditions": "",
"source_page": 7,
"source": "datasheet"
},
{
"name": "LRCK to BCK rising edge setup time (slave)",
"symbol": "t(LRSU)",
"kind": "timing",
"unit": "ns",
"min": 50,
"typ": null,
"max": null,
"conditions": "",
"source_page": 7,
"source": "datasheet"
},
{
"name": "LRCK to BCK rising edge hold time (slave)",
"symbol": "t(LRHD)",
"kind": "timing",
"unit": "ns",
"min": 10,
"typ": null,
"max": null,
"conditions": "",
"source_page": 7,
"source": "datasheet"
},
{
"name": "BCK falling edge to DOUT delay (slave)",
"symbol": "t(CKDO)",
"kind": "timing",
"unit": "ns",
"min": -10,
"typ": null,
"max": 40,
"conditions": "",
"source_page": 7,
"source": "datasheet"
},
{
"name": "LRCK edge to DOUT delay (slave)",
"symbol": "t(LRDO)",
"kind": "timing",
"unit": "ns",
"min": -10,
"typ": null,
"max": 40,
"conditions": "",
"source_page": 7,
"source": "datasheet"
},
{
"name": "BCK period (master)",
"symbol": "t(BCKP)",
"kind": "timing",
"unit": "ns",
"min": 150,
"typ": null,
"max": 2000,
"conditions": "master mode",
"source_page": 7,
"source": "datasheet"
},
{
"name": "BCK high-level width (master)",
"symbol": "t(BCKH)",
"kind": "timing",
"unit": "ns",
"min": 65,
"typ": null,
"max": 1200,
"conditions": "master mode",
"source_page": 7,
"source": "datasheet"
},
{
"name": "BCK low-level width (master)",
"symbol": "t(BCKL)",
"kind": "timing",
"unit": "ns",
"min": 65,
"typ": null,
"max": 1200,
"conditions": "master mode",
"source_page": 7,
"source": "datasheet"
},
{
"name": "BCK falling edge to LRCK valid (master)",
"symbol": "t(CKLR)",
"kind": "timing",
"unit": "ns",
"min": -10,
"typ": null,
"max": 20,
"conditions": "master mode",
"source_page": 7,
"source": "datasheet"
},
{
"name": "LRCK period (master)",
"symbol": "t(LRCP)",
"kind": "timing",
"unit": "ns",
"min": 10,
"typ": null,
"max": 125,
"conditions": "master mode",
"source_page": 7,
"source": "datasheet"
},
{
"name": "BCK falling edge to DOUT delay (master)",
"symbol": "t(CKDO)",
"kind": "timing",
"unit": "ns",
"min": -10,
"typ": null,
"max": 20,
"conditions": "master mode",
"source_page": 7,
"source": "datasheet"
},
{
"name": "LRCK edge to DOUT delay (master)",
"symbol": "t(LRDO)",
"kind": "timing",
"unit": "ns",
"min": -10,
"typ": null,
"max": 20,
"conditions": "master mode",
"source_page": 7,
"source": "datasheet"
},
{
"name": "SCKI rising edge to BCK edge delay (master)",
"symbol": "t(SCKBCK)",
"kind": "timing",
"unit": "ns",
"min": 5,
"typ": null,
"max": 30,
"conditions": "master mode, BCK as output",
"source_page": 8,
"source": "datasheet"
}
]
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"gc1808"
],
"discovery_pitch": "GC1808 (SX-globalchip) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"gc1808.kicad_sym",
"gc1808.kicad_mod",
"gc1808.glb",
"gc1808.step",
"gc1808.lbr",
"docs/hero.png",
"docs/gc1808-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"gc1808-hero.glb",
"gc1808-hero.overlay.json",
"gc1808-etched.glb"
],
"visibility": {
"public": true
}
}