component
GBI5132QYAR
Public Made by Adomby adom
GOSEMICON Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, QFN-20-EP(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "gbi5132qyar",
"version": "0.1.0",
"type": "component",
"description": "GOSEMICON Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, QFN-20-EP(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"power management (pmic)",
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"factory-2.0.0",
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"component": {
"mpn": "GBI5132QYAR",
"manufacturer": "GOSEMICON",
"package": "QFN-20-EP(3.5x3.5)",
"pin_count": 21,
"category": "Power Management (PMIC)",
"subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603383689078861824",
"parts": {
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"distributor_links": {
"lcsc": "C28324641"
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"distributor_check": {
"checked_at": "2026-10-18T01:04:20Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
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"pins": [
{
"number": "1",
"name": "OUT",
"type": "power_out",
"description": "Regulated output pin; a 22µF or larger capacitor (10µF or greater effective capacitance) is required for stability and should be placed as close to the device as possible."
},
{
"number": "2",
"name": "SNS",
"type": "input",
"description": "Output voltage sense pin, connected only when setting OUT by PCB layout with no external resistor; keep floating when OUT is set by an external resistor divider."
},
{
"number": "3",
"name": "FB",
"type": "input",
"description": "Feedback pin to the error amplifier; a 10nF feed-forward capacitor between FB and OUT is recommended, though it may disrupt Power-Good (PG) functionality."
},
{
"number": "4",
"name": "PG",
"type": "output",
"description": "Open-drain power-good output that is active high when the output is above 91% of target and pulled low below 85% of target, during EN shutdown, OTP, or OCP."
},
{
"number": "5",
"name": "25mV",
"type": "input",
"description": "Voltage-setting pin for the internal feedback network; connect to GND or SNS to select the output voltage, or leave floating when not in use."
},
{
"number": "6",
"name": "50mV",
"type": "input",
"description": "Voltage-setting pin for the internal feedback network; connect to GND or SNS to select the output voltage, or leave floating when not in use."
},
{
"number": "7",
"name": "100mV",
"type": "input",
"description": "Voltage-setting pin for the internal feedback network; connect to GND or SNS to select the output voltage, or leave floating when not in use."
},
{
"number": "8",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be connected to ground, the thermal pad, and the other GND pins with a low-impedance connection."
},
{
"number": "9",
"name": "200mV",
"type": "input",
"description": "Voltage-setting pin for the internal feedback network; connect to GND or SNS to select the output voltage, or leave floating when not in use."
},
{
"number": "10",
"name": "400mV",
"type": "input",
"description": "Voltage-setting pin for the internal feedback network; connect to GND or SNS to select the output voltage, or leave floating when not in use."
},
{
"number": "11",
"name": "800mV",
"type": "input",
"description": "Voltage-setting pin for the internal feedback network; connect to GND or SNS to select the output voltage, or leave floating when not in use."
},
{
"number": "12",
"name": "BIAS",
"type": "input",
"description": "BIAS supply pin that enables low-input, low-output (LILO) operation; a 1µF capacitor (0.47µF or larger) must be connected to ground, and the pin may be left floating or tied to ground if unused."
},
{
"number": "13",
"name": "NR/SS",
"type": "bidirectional",
"description": "Noise-reduction and soft-start pin; an external capacitor to ground reduces reference noise and enables soft-start, with 10nF or larger recommended as close to the pin as possible."
},
{
"number": "14",
"name": "EN",
"type": "input",
"description": "Enable pin; logic high enables the device and logic low disables it, and it must be tied to IN or BIAS if enable functionality is not required."
},
{
"number": "15",
"name": "IN",
"type": "power_in",
"description": "Input supply voltage pin; a 10µF or larger ceramic capacitor (5µF or greater effective) from IN to ground is required, placed as close as possible to the input."
},
{
"number": "16",
"name": "IN",
"type": "power_in",
"description": "Input supply voltage pin; a 10µF or larger ceramic capacitor (5µF or greater effective) from IN to ground is required, placed as close as possible to the input."
},
{
"number": "17",
"name": "IN",
"type": "power_in",
"description": "Input supply voltage pin; a 10µF or larger ceramic capacitor (5µF or greater effective) from IN to ground is required, placed as close as possible to the input."
},
{
"number": "18",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be connected to ground, the thermal pad, and the other GND pins with a low-impedance connection."
},
{
"number": "19",
"name": "OUT",
"type": "power_out",
"description": "Regulated output pin; a 22µF or larger capacitor (10µF or greater effective capacitance) is required for stability and should be placed as close to the device as possible."
},
{
"number": "20",
"name": "OUT",
"type": "power_out",
"description": "Regulated output pin; a 22µF or larger capacitor (10µF or greater effective capacitance) is required for stability and should be placed as close to the device as possible."
},
{
"number": "21",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed thermal pad (QFN-20-EP) is mentioned on page 3 ('Connect the thermal pad to ground plane; Pin-number assignments were taken from Table 1 (page 2) and the pin list (page 3). The pin diagram t; Types: the datasheet marks OUT as 'O' and IN/GND as power pins; I mapped OUT to power_out, IN and GN",
"exposed pad 21 added from the footprint"
],
"pages_sent": 6,
"cost_usd": 0.0516,
"at": "2026-10-18T01:00:06"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603383689078861824",
"pages": 32,
"sha256": "8f1efc80c6ccbef0",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 21,
"described": 21,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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}