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Ray Publish 0.1.0 e8c18e4 8d ago

FW102-TL-E-VB

VBsemi Elec · MOSFETs · SO-8

FW102-TL-E-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of P-channel MOSFET 1 (drain-source voltage rating -30 V).
2 G1 input Gate of P-channel MOSFET 1 (gate-source voltage limit ±20 V).
3 S2 passive Source of P-channel MOSFET 2 (drain-source voltage rating -30 V).
4 G2 input Gate of P-channel MOSFET 2 (gate-source voltage limit ±20 V).
5 D2 passive Drain of P-channel MOSFET 2 (continuous drain current -7.3 A at TC = 25 °C, limited by package).
6 D2 passive Drain of P-channel MOSFET 2, tied to pin 5 (pulsed drain current -32 A).
7 D1 passive Drain of P-channel MOSFET 1 (continuous drain current -7.3 A at TC = 25 °C, limited by package).
8 D1 passive Drain of P-channel MOSFET 1, tied to pin 7 (pulsed drain current -32 A).

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: FW102-TL-E-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: fw102-tl-e-vb-etched.step / fw102-tl-e-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fw102-tl-e-vb.step / fw102-tl-e-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (9 pp, sha256 02ef859c90cbb145, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF