FU6572N

{
  "slug": "fu6572n",
  "version": "0.1.0",
  "type": "component",
  "description": "Fortior Tech Microcontrollers (MCU/MPU/SOC), QFN-40-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "fu6572n",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "fu6572n.kicad_sym",
    "fu6572n.kicad_mod",
    "fu6572n.glb",
    "fu6572n.step",
    "fu6572n.lbr",
    "docs/hero.png",
    "docs/fu6572n-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "fu6572n-hero.glb",
    "fu6572n-hero.overlay.json",
    "fu6572n-etched.glb"
  ],
  "component": {
    "mpn": "FU6572N",
    "manufacturer": "Fortior Tech",
    "package": "QFN-40-EP(5x5)",
    "pin_count": 41,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/c9881d46dc351db0e43ff6150075e006.pdf",
    "parts": {
      "symbol": "fu6572n.kicad_sym",
      "footprint": "fu6572n.kicad_mod",
      "model_3d": "fu6572n-hero.glb",
      "model_3d_plain": "fu6572n-etched.glb",
      "model_3d_step": "fu6572n-etched.step",
      "model_3d_step_plain": "fu6572n.step",
      "lbr": "fu6572n.lbr"
    },
    "distributor_links": {
      "lcsc": "C5280125"
    },
    "distributor_check": {
      "checked_at": "2026-10-22T23:02:40Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "deferred",
        "error": "shared DigiKey quota guard: 711 calls left today"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VSU",
        "type": "power_in",
        "description": "6N pre-driver U-phase bootstrap return reference for the U high-side driver."
      },
      {
        "number": "2",
        "name": "HU",
        "type": "output",
        "description": "6N pre-driver U-phase high-side PWM output."
      },
      {
        "number": "3",
        "name": "VBU",
        "type": "power_in",
        "description": "6N pre-driver U-phase high-side bootstrap supply."
      },
      {
        "number": "4",
        "name": "VSV",
        "type": "power_in",
        "description": "6N pre-driver V-phase bootstrap return reference for the V high-side driver."
      },
      {
        "number": "5",
        "name": "HV",
        "type": "output",
        "description": "6N pre-driver V-phase high-side PWM output."
      },
      {
        "number": "6",
        "name": "VBV",
        "type": "power_in",
        "description": "6N pre-driver V-phase high-side bootstrap supply."
      },
      {
        "number": "7",
        "name": "VSW",
        "type": "power_in",
        "description": "6N pre-driver W-phase bootstrap return reference for the W high-side driver."
      },
      {
        "number": "8",
        "name": "HW",
        "type": "output",
        "description": "6N pre-driver W-phase high-side PWM output."
      },
      {
        "number": "9",
        "name": "VBW",
        "type": "power_in",
        "description": "6N pre-driver W-phase high-side bootstrap supply."
      },
      {
        "number": "10",
        "name": "VDD5",
        "type": "power_out",
        "description": "VDD5 supply pin, with an external 1uF to 4.7uF capacitor."
      },
      {
        "number": "11",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "12",
        "name": "P4.7/TIM3S2/RXD2S2/RSTN/FICEK",
        "type": "input",
        "description": "P4.7 input (GPIO); remapped Timer3 input, remapped UART2 RXD input, external reset input with internal pull-up, and FICE clock pin."
      },
      {
        "number": "13",
        "name": "P4.5/AD14",
        "type": "bidirectional",
        "description": "GPIO configurable as INT1 external interrupt input; ADC channel 14 input."
      },
      {
        "number": "14",
        "name": "P1.2/TIM4S2/TXD2S2/FICED",
        "type": "bidirectional",
        "description": "GPIO configurable as INT1 input; remapped Timer4 input/output, remapped UART2 TXD output, FICE data port."
      },
      {
        "number": "15",
        "name": "P1.3/HBIAS/C1PS/A3O/AD12",
        "type": "bidirectional",
        "description": "GPIO configurable as INT1 input; Hall bias supply switched internally to VDD5, remapped CMP1 positive input, AMP3 output, ADC channel 12 input."
      },
      {
        "number": "16",
        "name": "P1.4/C0P/A3M/AD10/HAL0S",
        "type": "bidirectional",
        "description": "GPIO configurable as INT1 input; CMP0 positive input, AMP3 negative input, ADC channel 10 input, remapped Hall-IC0 logic input."
      },
      {
        "number": "17",
        "name": "P1.5/C0M/C2PS/A3P/AD13",
        "type": "bidirectional",
        "description": "GPIO configurable as INT1 input; CMP0 negative input, remapped CMP2 positive input, AMP3 positive input, ADC channel 13 input."
      },
      {
        "number": "18",
        "name": "P1.6/C1P/A1P/AD9/HAL1S",
        "type": "bidirectional",
        "description": "GPIO configurable as INT1 input; CMP1 positive input, AMP1 positive input, ADC channel 9 input, remapped Hall-IC1 logic input."
      },
      {
        "number": "19",
        "name": "P1.7/C1M/A1M",
        "type": "bidirectional",
        "description": "GPIO configurable as INT1 input; CMP1 negative input and AMP1 negative input."
      },
      {
        "number": "20",
        "name": "P2.1/C2P/A2P/AD8/HAL2S",
        "type": "bidirectional",
        "description": "GPIO; CMP2 positive input, AMP2 positive input, ADC channel 8 input, remapped Hall-IC2 logic input."
      },
      {
        "number": "21",
        "name": "P2.2/C2M/A2M",
        "type": "bidirectional",
        "description": "GPIO; CMP2 negative input and AMP2 negative input."
      },
      {
        "number": "22",
        "name": "P2.4/AD2",
        "type": "bidirectional",
        "description": "GPIO; ADC channel 2 input, usable for bus voltage sampling."
      },
      {
        "number": "23",
        "name": "P2.5/AD3",
        "type": "bidirectional",
        "description": "GPIO; ADC channel 3 input."
      },
      {
        "number": "24",
        "name": "P2.6/C3M/DA0/AD11",
        "type": "bidirectional",
        "description": "GPIO; CMP3 negative input, DAC0 unbuffered output, ADC channel 11 input."
      },
      {
        "number": "25",
        "name": "P3.0/A0M",
        "type": "bidirectional",
        "description": "GPIO; AMP0 negative input."
      },
      {
        "number": "26",
        "name": "P3.1/A0P",
        "type": "bidirectional",
        "description": "GPIO; AMP0 positive input."
      },
      {
        "number": "27",
        "name": "P3.3/AD6",
        "type": "bidirectional",
        "description": "GPIO; ADC channel 6 input."
      },
      {
        "number": "28",
        "name": "P3.4/AD7/C3PS/C4MS",
        "type": "bidirectional",
        "description": "GPIO; ADC channel 7 input (with AMP_CR0[CP_EN]=1 AMP0 output goes via internal 50k to P3.4, needing external 1uF, for average bus current), remapped CMP3 positive and CMP4 negative inputs."
      },
      {
        "number": "29",
        "name": "P3.5/VREF",
        "type": "bidirectional",
        "description": "GPIO; ADC external reference input or internal VREF output, with external series R (33 ohm) + C (1uF to 4.7uF) to VSS."
      },
      {
        "number": "30",
        "name": "P3.6/HAL2/RXD2",
        "type": "bidirectional",
        "description": "GPIO; Hall-IC2 logic input; UART2 RXD input in two-wire mode or TXD output/RXD input in single-wire mode."
      },
      {
        "number": "31",
        "name": "P0.0/TIM4S/TXD2S/SDA",
        "type": "bidirectional",
        "description": "GPIO configurable as INT0 input; remapped Timer4 input/output, remapped UART2 TXD output, I2C SDA configurable as open-drain."
      },
      {
        "number": "32",
        "name": "P0.1/DBG/TIM4/TIM3S/RXD2S/SCL",
        "type": "bidirectional",
        "description": "GPIO configurable as INT0 input; Debug port, Timer4 input/output, remapped Timer3 input/output, remapped UART2 RXD/single-wire pin, I2C SCL open-drain clock."
      },
      {
        "number": "33",
        "name": "P0.5/TXD/SCLK",
        "type": "bidirectional",
        "description": "GPIO configurable as INT0 input; UART1 TXD output and SPI clock SCLK."
      },
      {
        "number": "34",
        "name": "P0.6/RXD/MOSI",
        "type": "bidirectional",
        "description": "GPIO configurable as INT0 input; UART1 RXD input (or single-wire TXD/RXD) and SPI MOSI."
      },
      {
        "number": "35",
        "name": "P1.1/TIM3",
        "type": "bidirectional",
        "description": "GPIO configurable as INT0/INT1 input; Timer3 input or output."
      },
      {
        "number": "36",
        "name": "VCC",
        "type": "power_in",
        "description": "VCC supply, with an external 1uF to 4.7uF capacitor."
      },
      {
        "number": "37",
        "name": "VSS",
        "type": "power_in",
        "description": "Power ground."
      },
      {
        "number": "38",
        "name": "LU",
        "type": "output",
        "description": "6N pre-driver U-phase low-side PWM output."
      },
      {
        "number": "39",
        "name": "LV",
        "type": "output",
        "description": "6N pre-driver V-phase low-side PWM output."
      },
      {
        "number": "40",
        "name": "LW",
        "type": "output",
        "description": "6N pre-driver W-phase low-side PWM output."
      },
      {
        "number": "41",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin diagram (page 51) says the exposed pad is down-bonded to VSS, but the pin table gives it no ; The table lists VDD5 only as type P. The revision history says FU6572 has an internal LDO that outpu; The table gives the I/O type of P0.0 (pin 31) as 'DO/DB/DB/DO/' with the last entry blank. It is tre"
        ],
        "pages_sent": 85,
        "cost_usd": 0.6123,
        "at": "2026-10-22T23:02:22"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/c9881d46dc351db0e43ff6150075e006.pdf",
        "pages": 399,
        "sha256": "7f4db0deacdfc220",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 41,
        "described": 41,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "fu6572n.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "8f37bc7a9aab4742c34f137d9822c0352acc227532830034555744338483cdfc",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "fu6572n-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c7c2d9f28c7f653b1314ff69dbab800ac14af31e4c062f99c44329772598ce34",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}