main
Ray Publish 0.1.0 36d2128 13d ago
{
  "slug": "ft61fc23-rb",
  "version": "0.1.0",
  "type": "component",
  "description": "FMD Fremont Micro Devices Microcontrollers (MCU/MPU/SOC), SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "ft61fc23-rb",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ft61fc23-rb.kicad_sym",
    "ft61fc23-rb.kicad_mod",
    "ft61fc23-rb.glb",
    "ft61fc23-rb.step",
    "ft61fc23-rb.lbr",
    "docs/hero.png",
    "docs/ft61fc23-rb-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ft61fc23-rb-hero.glb",
    "ft61fc23-rb-hero.overlay.json",
    "ft61fc23-rb-etched.glb"
  ],
  "component": {
    "mpn": "FT61FC23-RB",
    "manufacturer": "FMD Fremont Micro Devices",
    "package": "SOP-16",
    "pin_count": 16,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836862240940032",
    "parts": {
      "symbol": "ft61fc23-rb.kicad_sym",
      "footprint": "ft61fc23-rb.kicad_mod",
      "model_3d": "ft61fc23-rb-hero.glb",
      "model_3d_plain": "ft61fc23-rb-etched.glb",
      "model_3d_step": "ft61fc23-rb-etched.step",
      "model_3d_step_plain": "ft61fc23-rb.step",
      "lbr": "ft61fc23-rb.lbr"
    },
    "distributor_links": {
      "lcsc": "C2984838"
    },
    "distributor_check": {
      "checked_at": "2026-10-14T17:01:06Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin; the datasheet gives VDD from VPOR (≤2.0 V) to 5.5 V under the 5 V, 25 °C operating conditions."
      },
      {
        "number": "2",
        "name": "PA7 (T1CKI/CLKI/OSC1)",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be configured as the Timer1 clock input T1CKI or the external oscillator/clock input OSC1/CLKI through the IDE configuration."
      },
      {
        "number": "3",
        "name": "PA6 (T1G/CLKO/OSC2)",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be configured as the oscillator output OSC2, the instruction-clock output CLKO, or the Timer1 gate input T1G."
      },
      {
        "number": "4",
        "name": "PA5 (MCLRB)",
        "type": "input",
        "description": "External reset input /MCLRB when enabled in the configuration registers; it is weakly pulled up to VDD, and the datasheet recommends an external RC filter as in Figure 4-3 (1 kΩ, 0.1 µF, 100 Ω)."
      },
      {
        "number": "5",
        "name": "PC3 (PWM4/P1C)",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with weak pull-up/pull-down capability that can also be the PWM4 output or the ECCP enhanced PWM output P1C."
      },
      {
        "number": "6",
        "name": "PC2 (AN6/PWM5/P1D)",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with weak pull-up/pull-down capability that can also be ADC analog input AN6, the PWM5 output, or the ECCP enhanced PWM output P1D."
      },
      {
        "number": "7",
        "name": "PA4 (VREGP/ATEST0)",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be the high-voltage regulator output VREGP or the ATEST0 pin."
      },
      {
        "number": "8",
        "name": "PC5 (VREGN/CCP1/P1A)",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be the low-voltage regulator output VREGN, the ECCP capture/compare pin CCP1, or the ECCP PWM output P1A."
      },
      {
        "number": "9",
        "name": "PC4/P1B/PWM3/C2OUT",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be comparator 2 output C2OUT, the PWM3 output, or the ECCP PWM output P1B."
      },
      {
        "number": "10",
        "name": "PC1/AN5/C2IN-/P1E/INT",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with weak pull-down capability that can also be ADC input AN5, comparator inverting input, the ECCP PWM output P1E, or the external edge interrupt INT."
      },
      {
        "number": "11",
        "name": "PC0/AN4/C2IN+/P1F/VREF",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be ADC input AN4, comparator 2 non-inverting input C2IN+, the ECCP PWM output P1F, or the external VREF reference input."
      },
      {
        "number": "12",
        "name": "PA3/AN3",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be ADC analog input AN3 and supports port-change interrupt input."
      },
      {
        "number": "13",
        "name": "PA2/AN2/C1OUT/T0CKI",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be ADC input AN2, comparator 1 output C1OUT, or the Timer0 clock input T0CKI."
      },
      {
        "number": "14",
        "name": "PA1/AN1/C1IN-/ISPDAT",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be ADC input AN1, comparator 1 inverting input C1IN-, or the ISP data pin ISPDAT used for programming/debug."
      },
      {
        "number": "15",
        "name": "PA0/AN0/C1IN+/ISPCLK",
        "type": "bidirectional",
        "description": "General-purpose digital I/O that can also be ADC input AN0, comparator 1 non-inverting input C1IN+, or the ISP clock pin ISPCLK used for programming/debug."
      },
      {
        "number": "16",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin for the device."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: PC1 comparator function conflicts within the datasheet: the SOP16 pin figure (Fig. 1-7) labels pin 1; Pin numbers were derived from the SOP16 figure (Fig. 1-7) text, cross-checked against the per-functi; Pin types are inferred: PA5/MCLRB is typed as input (external reset input, input-only in the port ta"
        ],
        "pages_sent": 50,
        "cost_usd": 0.2003,
        "at": "2026-10-14T17:00:48"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836862240940032",
        "pages": 114,
        "sha256": "4472e73852f781e2",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ft61fc23-rb.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-14",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ft61fc23-rb-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "1ac752c851f64b604380bc43e1bbae605f3953b1f15c9ecc5021f0cfaa869b10",
        "checked": "2026-10-14",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}