component
FT61FC23-RB
Public Made by Adomby adom
FMD Fremont Micro Devices Microcontrollers (MCU/MPU/SOC), SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| ft61fc23-rb-etched.glb | 13d ago |
| ft61fc23-rb-etched.step | 13d ago |
| ft61fc23-rb-hero.glb | 13d ago |
| ft61fc23-rb-hero.overlay.json | 13d ago |
| ft61fc23-rb.glb | 13d ago |
| ft61fc23-rb.kicad_mod | 13d ago |
| ft61fc23-rb.kicad_sym | 13d ago |
| ft61fc23-rb.lbr | 13d ago |
| ft61fc23-rb.step | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
FT61FC23-RB
FMD Fremont Micro Devices · Microcontrollers (MCU/MPU/SOC) · SOP-16
FT61FC23-RB from FMD Fremont Micro Devices, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply pin; the datasheet gives VDD from VPOR (≤2.0 V) to 5.5 V under the 5 V, 25 °C operating conditions. |
| 2 | PA7 (T1CKI/CLKI/OSC1) | bidirectional | General-purpose digital I/O that can also be configured as the Timer1 clock input T1CKI or the external oscillator/clock input OSC1/CLKI through the IDE configuration. |
| 3 | PA6 (T1G/CLKO/OSC2) | bidirectional | General-purpose digital I/O that can also be configured as the oscillator output OSC2, the instruction-clock output CLKO, or the Timer1 gate input T1G. |
| 4 | PA5 (MCLRB) | input | External reset input /MCLRB when enabled in the configuration registers; it is weakly pulled up to VDD, and the datasheet recommends an external RC filter as in Figure 4-3 (1 kΩ, 0.1 µF, 100 Ω). |
| 5 | PC3 (PWM4/P1C) | bidirectional | General-purpose digital I/O with weak pull-up/pull-down capability that can also be the PWM4 output or the ECCP enhanced PWM output P1C. |
| 6 | PC2 (AN6/PWM5/P1D) | bidirectional | General-purpose digital I/O with weak pull-up/pull-down capability that can also be ADC analog input AN6, the PWM5 output, or the ECCP enhanced PWM output P1D. |
| 7 | PA4 (VREGP/ATEST0) | bidirectional | General-purpose digital I/O that can also be the high-voltage regulator output VREGP or the ATEST0 pin. |
| 8 | PC5 (VREGN/CCP1/P1A) | bidirectional | General-purpose digital I/O that can also be the low-voltage regulator output VREGN, the ECCP capture/compare pin CCP1, or the ECCP PWM output P1A. |
| 9 | PC4/P1B/PWM3/C2OUT | bidirectional | General-purpose digital I/O that can also be comparator 2 output C2OUT, the PWM3 output, or the ECCP PWM output P1B. |
| 10 | PC1/AN5/C2IN-/P1E/INT | bidirectional | General-purpose digital I/O with weak pull-down capability that can also be ADC input AN5, comparator inverting input, the ECCP PWM output P1E, or the external edge interrupt INT. |
| 11 | PC0/AN4/C2IN+/P1F/VREF | bidirectional | General-purpose digital I/O that can also be ADC input AN4, comparator 2 non-inverting input C2IN+, the ECCP PWM output P1F, or the external VREF reference input. |
| 12 | PA3/AN3 | bidirectional | General-purpose digital I/O that can also be ADC analog input AN3 and supports port-change interrupt input. |
| 13 | PA2/AN2/C1OUT/T0CKI | bidirectional | General-purpose digital I/O that can also be ADC input AN2, comparator 1 output C1OUT, or the Timer0 clock input T0CKI. |
| 14 | PA1/AN1/C1IN-/ISPDAT | bidirectional | General-purpose digital I/O that can also be ADC input AN1, comparator 1 inverting input C1IN-, or the ISP data pin ISPDAT used for programming/debug. |
| 15 | PA0/AN0/C1IN+/ISPCLK | bidirectional | General-purpose digital I/O that can also be ADC input AN0, comparator 1 non-inverting input C1IN+, or the ISP clock pin ISPCLK used for programming/debug. |
| 16 | GND | power_in | Ground reference pin for the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FMD Fremont Micro Devices |
| Package | SOP-16 |
| Category | Embedded Processors & Controllers |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating temperature grade 3 (工作温度等级 3) | -40 | 85 | °C | 96 | |||
| Operating temperature grade 2 (工作温度等级 2) | -40 | 105 | °C | 96 | |||
| Operating temperature grade 1 (工作温度等级 1) | -40 | 125 | °C | 96 | |||
| Storage temperature (存储温度) | -40 | 125 | °C | 96 | |||
| System clock frequency Fsys (SysClk 2T/4T), VDD 2.0-5.5 V | Fsys | 8 | MHz | -40, 85°C, VDD = 2.0, 5.5V | 96 | ||
| System clock frequency Fsys (SysClk 2T/4T), VDD 2.7-5.5 V | Fsys | 16 | MHz | -40, 85°C, VDD = 2.7, 5.5V | 96 | ||
| T0CKI high or low pulse width (with prescaler) | 10 | ns | 有预分频 | 96 | |||
| External reset pulse width (TMCLRB) | TMCLRB | 2000 | ns | 25°C | 96 | ||
| LVR threshold, step 1 | VLVR | 1.92 | 2 | 2.08 | V | 25°C | 97 |
| LVR threshold, step 2 | VLVR | 2.11 | 2.2 | 2.29 | V | 25°C | 97 |
| LVR threshold, step 3 | VLVR | 2.4 | 2.5 | 2.6 | V | 25°C | 97 |
| LVR threshold, step 4 | VLVR | 2.69 | 2.8 | 2.91 | V | 25°C | 97 |
| LVR threshold, step 5 | VLVR | 2.98 | 3.1 | 3.22 | V | 25°C | 97 |
| LVR threshold, step 6 | VLVR | 3.46 | 3.6 | 3.74 | V | 25°C | 97 |
| LVR threshold, step 7 | VLVR | 3.94 | 4.1 | 4.26 | V | 25°C | 97 |
| LVR delay | 125 | 157 | μs | 25°C, VDD = 2.0, 5.5V | 97 | ||
| LVD threshold, step 1 | VLVD | 1.92 | 2 | 2.08 | V | 25°C | 97 |
| LVD threshold, step 2 | VLVD | 2.3 | 2.4 | 2.5 | V | 25°C | 97 |
| LVD threshold, step 3 | VLVD | 2.69 | 2.8 | 2.91 | V | 25°C | 97 |
| LVD threshold, step 4 | VLVD | 2.88 | 3 | 3.12 | V | 25°C | 97 |
| LVD threshold, step 5 | VLVD | 3.46 | 3.6 | 3.74 | V | 25°C | 97 |
| LVD threshold, step 6 | VLVD | 3.84 | 4 | 4.16 | V | 25°C | 97 |
| LVD delay | 125 | 157 | μs | 25°C, VDD = 2.0, 5.5V | 97 |
CAD (KiCad official)
- Symbol:
FT61FC23-RB - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
ft61fc23-rb-etched.step/ft61fc23-rb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ft61fc23-rb.step/ft61fc23-rb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FMD Fremont Micro Devices datasheet (114 pp, sha256
4472e73852f781e2, retrieved 2026-10-14, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).