component
FSV9523
Public Made by Adomby adom
Forsinve RFID ICs, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "fsv9523",
"version": "0.1.0",
"type": "component",
"description": "Forsinve RFID ICs, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"rf and wireless",
"fsv9523",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
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"README.md",
"fsv9523.kicad_sym",
"fsv9523.kicad_mod",
"fsv9523.glb",
"fsv9523.step",
"fsv9523.lbr",
"docs/hero.png",
"docs/fsv9523-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"fsv9523-hero.glb",
"fsv9523-hero.overlay.json",
"fsv9523-etched.glb"
],
"component": {
"mpn": "FSV9523",
"manufacturer": "Forsinve",
"package": "QFN-32(5x5)",
"pin_count": 33,
"category": "RF And Wireless",
"subcategory": "RFID ICs",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603101970450702336",
"parts": {
"symbol": "fsv9523.kicad_sym",
"footprint": "fsv9523.kicad_mod",
"model_3d": "fsv9523-hero.glb",
"model_3d_plain": "fsv9523-etched.glb",
"model_3d_step": "fsv9523-etched.step",
"model_3d_step_plain": "fsv9523.step",
"lbr": "fsv9523.lbr"
},
"distributor_links": {
"lcsc": "C5336461"
},
"distributor_check": {
"checked_at": "2026-10-18T04:10:03Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "I2C",
"type": "input",
"description": "I2C-bus enable input; a logic 1 on this pin selects the I2C-bus interface during interface detection after reset (Table 5)."
},
{
"number": "2",
"name": "PVDD",
"type": "power_in",
"description": "Pin power supply, which must always be the same or a lower voltage than DVDD (VDD(PVDD) ≤ VDDD)."
},
{
"number": "3",
"name": "DVDD",
"type": "power_in",
"description": "Digital power supply, which must always be the same voltage as AVDD and TVDD."
},
{
"number": "4",
"name": "DVSS",
"type": "power_in",
"description": "Digital ground; connection of the underside heatsink pad is not necessary, and an optional connection to this pin is possible."
},
{
"number": "5",
"name": "PVSS",
"type": "power_in",
"description": "Pin power supply ground."
},
{
"number": "6",
"name": "NRSTPD",
"type": "input",
"description": "Reset and power-down input: a positive edge enables reset, and a LOW level enables power-down, which switches off the internal current sinks, inhibits the oscillator and disconnects the input pins from the outside world."
},
{
"number": "7",
"name": "MFIN",
"type": "input",
"description": "MIFARE signal input, powered from the SVDD supply (pin 9)."
},
{
"number": "8",
"name": "MFOUT",
"type": "output",
"description": "MIFARE signal output, powered from the SVDD supply (pin 9)."
},
{
"number": "9",
"name": "SVDD",
"type": "power_in",
"description": "MFIN and MFOUT pin power supply."
},
{
"number": "10",
"name": "TVSS",
"type": "power_in",
"description": "Transmitter output stage 1 ground."
},
{
"number": "11",
"name": "TX1",
"type": "output",
"description": "Transmitter 1 modulated 13.56 MHz energy carrier output, whose output stage is supplied from TVDD."
},
{
"number": "12",
"name": "TVDD",
"type": "power_in",
"description": "Transmitter power supply for the output stages of transmitters 1 and 2, which must always be the same voltage as DVDD and AVDD."
},
{
"number": "13",
"name": "TX2",
"type": "output",
"description": "Transmitter 2 modulated 13.56 MHz energy carrier output, whose output stage is supplied from TVDD."
},
{
"number": "14",
"name": "TVSS",
"type": "power_in",
"description": "Transmitter output stage 2 ground."
},
{
"number": "15",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, which must always be the same voltage as DVDD and TVDD (VDDA = 3 V in the quick reference conditions)."
},
{
"number": "16",
"name": "VMID",
"type": "power_in",
"description": "Internal reference voltage pin (type P as printed in the datasheet)."
},
{
"number": "17",
"name": "RX",
"type": "input",
"description": "RF signal input for the receiver."
},
{
"number": "18",
"name": "AVSS",
"type": "power_in",
"description": "Analog ground."
},
{
"number": "19",
"name": "AUX1",
"type": "output",
"description": "Auxiliary output for test purposes."
},
{
"number": "20",
"name": "AUX2",
"type": "output",
"description": "Auxiliary output for test purposes."
},
{
"number": "21",
"name": "OSCIN",
"type": "input",
"description": "Crystal oscillator inverting amplifier input, which is also the input for an externally generated clock of fclk = 27.12 MHz."
},
{
"number": "22",
"name": "OSCOUT",
"type": "output",
"description": "Crystal oscillator inverting amplifier output."
},
{
"number": "23",
"name": "IRQ",
"type": "output",
"description": "Interrupt request output that indicates an interrupt event."
},
{
"number": "24",
"name": "SDA/NSS/RX",
"type": "bidirectional",
"description": "I2C-bus serial data line input/output, which alternatively serves as SPI slave select input NSS or UART address input RX depending on the detected host interface (Table 5)."
},
{
"number": "25",
"name": "D1/ADR_5",
"type": "bidirectional",
"description": "Test port I/O pin D1, which alternatively serves as I2C-bus address 5 input ADR_5; when SPI is used only D1 to D4 can be used as test pins."
},
{
"number": "26",
"name": "D2/ADR_4",
"type": "bidirectional",
"description": "Test port I/O pin D2, which alternatively serves as I2C-bus address 4 input ADR_4."
},
{
"number": "27",
"name": "D3/ADR_3",
"type": "bidirectional",
"description": "Test port I/O pin D3, which alternatively serves as I2C-bus address 3 input ADR_3."
},
{
"number": "28",
"name": "D4/ADR_2",
"type": "bidirectional",
"description": "Test port I/O pin D4, which alternatively serves as I2C-bus address 2 input ADR_2."
},
{
"number": "29",
"name": "D5/ADR_1/SCK/DTRQ",
"type": "bidirectional",
"description": "Test port I/O pin D5, which alternatively serves as I2C-bus address 1 input ADR_1, SPI serial clock input SCK, or UART request-to-send output DTRQ."
},
{
"number": "30",
"name": "D6/ADR_0/MOSI/MX",
"type": "bidirectional",
"description": "Test port I/O pin D6, which alternatively serves as I2C-bus address 0 input ADR_0, SPI master out slave in MOSI, or UART output MX."
},
{
"number": "31",
"name": "D7/SCL/MISO/TX",
"type": "bidirectional",
"description": "Test port I/O pin D7, which alternatively serves as I2C-bus clock input/output SCL, SPI master in slave out MISO, or UART data output TX."
},
{
"number": "32",
"name": "EA",
"type": "input",
"description": "External address input used to code the I2C-bus address."
},
{
"number": "33",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package check: the datasheet orders FSV9523 only as HVQFN32 (body 5 x 5 x 0.85 mm, Table 2, page 3),; VMID (pin 16) is printed as type P (internal reference voltage) and was mapped to power_in following; Pins 24 to 31 are multi-function. The types shown are the datasheet's primary I/O classification for",
"exposed pad 33 added from the footprint"
],
"pages_sent": 14,
"cost_usd": 0.0749,
"at": "2026-10-18T04:09:09"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603101970450702336",
"pages": 88,
"sha256": "6463f993b9537679",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
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"file": "fsv9523.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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5.0,
0.875
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"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "fsv9523-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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"zmin_mm": 0.0,
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"footprint_binding": "identity",
"sha256": "874b5a0069e7b9d30928e7aa4b5dce34c09400a97189a709c0b956c86181aa03",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}