component
FS4559
Public Made by Adomby adom
FOSAN MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 17d ago |
| viewers | 17d ago |
| fs4559-etched.glb | 17d ago |
| fs4559-etched.step | 17d ago |
| fs4559-hero.glb | 17d ago |
| fs4559-hero.overlay.json | 17d ago |
| fs4559.glb | 17d ago |
| fs4559.kicad_mod | 17d ago |
| fs4559.kicad_sym | 17d ago |
| fs4559.lbr | 17d ago |
| fs4559.step | 17d ago |
| package.json | 17d ago |
| page.json | 17d ago |
| README.md | 17d ago |
FS4559
FOSAN · MOSFETs · SOP-8
FS4559 from FOSAN, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S2 | passive | Source of MOSFET 2, at the pin-1 corner of the SOP-8. |
| 2 | G2 | input | Gate of MOSFET 2, with a rated gate-source voltage of ±20 V. |
| 3 | S1 | passive | Source of MOSFET 1. |
| 4 | G1 | input | Gate of MOSFET 1, with a rated gate-source voltage of ±20 V. |
| 5 | D1 | passive | Drain of MOSFET 1, tied internally to pin 6; the drain-source rating is 60 V (N) or -60 V (P). |
| 6 | D1 | passive | Drain of MOSFET 1, tied internally to pin 5. |
| 7 | D2 | passive | Drain of MOSFET 2, tied internally to pin 8; the drain-source rating is 60 V (N) or -60 V (P). |
| 8 | D2 | passive | Drain of MOSFET 2, tied internally to pin 7. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FOSAN |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage (N-channel) | BVDSS | 60 | V | ID=250uA, VGS=0V | 2 | ||
| Gate Threshold Voltage (N-channel) | VGS(th) | 1 | 1.7 | 2.5 | V | ID=250uA, VGS=VDS | 2 |
| Zero Gate Voltage Drain Current (N-channel) | IDSS | 1 | uA | VGS=0V, VDS=48V | 2 | ||
| Gate Body Leakage (N-channel) | IGSS | 100 | nA | VGS=+20V, VDS=0V | 2 | ||
| Static Drain-Source On-State Resistance (N-channel) | RDS(ON) | 37 | 58 | mΩ | ID=4.5A, VGS=10V | 2 | |
| Static Drain-Source On-State Resistance (N-channel) | RDS(ON) | 42 | 60 | mΩ | ID=3A, VGS=4.5V | 2 | |
| Diode Forward Voltage Drop (N-channel body diode) | VSD | 0.76 | 1 | V | ISD=1A, VGS=0V | 2 | |
| Drain-Source Breakdown Voltage (P-channel) | BVDSS | -60 | V | ID = -250uA, VGS=0V | 3 | ||
| Gate Threshold Voltage (P-channel) | VGS(th) | -1 | -1.8 | -2.5 | V | ID = -250uA, VGS= VDS | 3 |
| Zero Gate Voltage Drain Current (P-channel) | IDSS | -1 | uA | VGS=0V, VDS= -48V | 3 | ||
| Gate Body Leakage (P-channel) | IGSS | 100 | nA | VGS=+20V, VDS=0V | 3 | ||
| Static Drain-Source On-State Resistance (P-channel) | RDS(ON) | 70 | 90 | mΩ | ID= -3.2A, VGS= -10V | 3 | |
| Static Drain-Source On-State Resistance (P-channel) | RDS(ON) | 93 | 125 | mΩ | ID= -2.8A, VGS= -4.5V | 3 | |
| Diode Forward Voltage Drop (P-channel body diode) | VSD | -0.77 | -1 | V | ISD= -1A, VGS=0V | 3 | |
| Drain-Source Voltage (N-channel) | BVDSS | 60 | V | N-channel | 1 | ||
| Drain-Source Voltage (P-channel) | BVDSS | -60 | V | P-channel | 1 | ||
| Gate-Source Voltage (N-channel) | VGS | 20 | V | N-channel | 1 | ||
| Gate-Source Voltage (P-channel) | VGS | 20 | V | P-channel | 1 | ||
| Drain Current continuous (N-channel) | ID | 4.5 | A | TA = 25°C | 1 | ||
| Drain Current continuous (N-channel) | ID | 3.6 | A | TA = 70°C | 1 | ||
| Drain Current continuous (P-channel) | ID | -3.2 | A | TA = 25°C | 1 | ||
| Drain Current continuous (P-channel) | ID | -2.8 | A | TA = 70°C | 1 | ||
| Drain Current pulsed (N-channel) | IDM | 20 | A | 1 | |||
| Drain Current pulsed (P-channel) | IDM | -20 | A | 1 | |||
| Total Device Dissipation | PTOT | 1 | W | TA = 25°C | 1 | ||
| Total Device Dissipation | PTOT | 0.7 | W | TA = 70°C | 1 | ||
| Thermal Resistance Junction-Ambient | RΘJA | 125 | ℃/W | 1 | |||
| Avalanche Energy Single Pulse | EAS | 25 | mJ | Single pulse | 1 | ||
| Junction/Storage Temperature | TJ,Tstg | -55 | 150 | ℃ | 1 |
CAD (KiCad official)
- Symbol:
FS4559 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
fs4559-etched.step/fs4559-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fs4559.step/fs4559.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FOSAN datasheet (8 pp, sha256
0d51bf0d623777e9, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).