component
FOD073LR2
Public Made by Adomby adom
onsemi Logic Output Optoisolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFOD073LR2
onsemi · Logic Output Optoisolators · SOIC-8
FOD073LR2 from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VF1+ | passive | Anode of channel 1 input LED; forward voltage 1.35 V typ at IF = 1.6 mA, absolute max DC forward current 20 mA. |
| 2 | VF1- | passive | Cathode of channel 1 input LED; reverse input voltage limited to 5 V. |
| 3 | VF2- | passive | Cathode of channel 2 input LED; reverse input voltage limited to 5 V. |
| 4 | VF2+ | passive | Anode of channel 2 input LED; forward voltage 1.35 V typ at IF = 1.6 mA, absolute max DC forward current 20 mA. |
| 5 | GND | power_in | Ground for the detector side of both channels. |
| 6 | VO2 | output | Channel 2 open-collector darlington output, goes low when LED is on, with absolute max output voltage -0.5 to 7 V and average output current 60 mA. |
| 7 | VO1 | output | Channel 1 open-collector darlington output, goes low when LED is on, with absolute max output voltage -0.5 to 7 V and average output current 60 mA. |
| 8 | VCC | power_in | Detector supply for both channels, specified at 3.3 V with absolute max -0.5 to 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Optoisolators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | TSTG | -40 | 125 | °C | 3 | ||
| Operating Temperature | TOPR | -40 | 85 | °C | 3 | ||
| Lead Solder Temperature | TSOL | 260 | °C | for 10 sec; wave solder only, see reflow profile for surface mount devices | 3 | ||
| DC/Average Forward Input Current | IF (avg) | 20 | mA | Each Channel | 3 | ||
| Peak Forward Input Current | IF (pk) | 40 | mA | 50% duty cycle, 1ms P.W.; Each Channel | 3 | ||
| Peak Transient Input Current | IF (trans) | 1 | A | ≤1µs P.W., 300 pps; Each Channel | 3 | ||
| Reverse Input Voltage | VR | 5 | V | Each Channel | 3 | ||
| Input Power Dissipation | PD | 35 | mW | Each Channel | 3 | ||
| Average Output Current | IO (avg) | 60 | mA | Each Channel | 3 | ||
| Supply Voltage, Output Voltage | VCC, VO | -0.5 | 7 | V | Each Channel | 3 | |
| Output power dissipation | PD | 100 | mW | Each Channel | 3 | ||
| Input Forward Voltage | VF | 1.35 | 1.7 | V | TA = 25°C | 4 | |
| Input Forward Voltage | VF | 1.75 | V | IF = 1.6mA (Each Channel) | 4 | ||
| Input Reverse Breakdown Voltage | BVR | 5 | V | TA = 25°C, IR = 10µA (Each Channel) | 4 | ||
| Logic High Output Current | IOH | 0.05 | 25 | µA | IF = 0 mA, VO = VCC = 3.3V (Each Channel) | 4 | |
| Logic Low Supply Current | ICCL | 0.8 | 3 | mA | IF1 = IF2 = 1.6mA, VO1 = VO2 = Open, VCC = 3.3V | 4 | |
| Logic High Supply Current | ICCH | 0.01 | 2 | µA | IF1 = IF2 = 0mA, VO1 = VO2 = Open, VCC = 3.3V | 4 | |
| Current Transfer Ratio | CTR | 400 | 7000 | % | IF = 0.5mA, VO = 0.4V, VCC = 3.3V | 4 | |
| Logic Low Output Voltage | VOL | 0.07 | 0.3 | V | IF = 1.6mA, IO = 8mA, VCC = 3.3V | 4 | |
| Logic Low Output Voltage | VOL | 0.07 | 0.4 | V | IF = 5mA, IO = 15mA, VCC = 3.3V | 4 | |
| Propagation Delay Time to Logic LOW | TPHL | 5 | 30 | µs | RL = 4.7kΩ, IF = 0.5mA (Fig. 9) | 4 | |
| Propagation Delay Time to Logic HIGH | TPLH | 25 | 90 | µs | RL = 4.7kΩ, IF = 0.5mA (Fig. 9) | 4 | |
| Common Mode Transient Immunity at Logic HIGH | /CMH/ | 1000 | 10000 | V/µs | IF = 0 mA, /VCM/ = 10 VP-P, TA = 25°C, RL = 2.2kΩ (Fig. 10) | 4 | |
| Common Mode Transient Immunity at Logic LOW | /CML/ | 1000 | 10000 | V/µs | IF = 1.6mA, /VCM/ = 10 VP-P, RL = 2.2kΩ, TA = 25°C (Fig. 10) | 4 | |
| Input-Output Insulation Leakage Current | II-O | 1 | µA | Relative humidity = 45%, TA = 25°C, t = 5 s, VI-O = 3000 VDC | 5 | ||
| Withstand Insulation Test Voltage | VISO | 2500 | VRMS | RH ≤ 50%, TA = 25°C, II-O ≤ 2µA, t = 1 min. | 5 | ||
| Resistance (Input to Output) | RI-O | 1012 | Ω | VI-O = 500 VDC | 5 | ||
| Capacitance (Input to Output) | CI-O | 0.7 | pF | f = 1 MHz (Notes 3, 4) | 5 | ||
| Input-Input Insulation Leakage Current | II-I | 0.005 | µA | RH ≤ 45%, VI-I = 500 VDC (Note 5) | 5 | ||
| Input-Input Resistance | RI-I | 1011 | Ω | VI-I = 500 VDC (Note 5) | 5 | ||
| Input-Input Capacitance | CI-I | 0.03 | pF | f = 1 MHz (Note 5) | 5 |
CAD (KiCad official)
- Symbol:
FOD073LR2 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
fod073lr2-etched.step/fod073lr2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fod073lr2.step/fod073lr2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (13 pp, sha256
499d97308aba207c, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).