FM33LG023A

{
  "slug": "fm33lg023a",
  "version": "0.1.0",
  "type": "component",
  "description": "FUDAN MICRO Microcontroller Units (MCUs/MPUs/SOCs), QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "single chip microcomputer-microcontroller",
    "fm33lg023a",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "fm33lg023a.kicad_sym",
    "fm33lg023a.kicad_mod",
    "fm33lg023a.glb",
    "fm33lg023a.step",
    "fm33lg023a.lbr",
    "docs/hero.png",
    "docs/fm33lg023a-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "fm33lg023a-hero.glb",
    "fm33lg023a-hero.overlay.json",
    "fm33lg023a-etched.glb"
  ],
  "component": {
    "mpn": "FM33LG023A",
    "manufacturer": "FUDAN MICRO",
    "package": "QFN-32(5x5)",
    "pin_count": 33,
    "category": "Single Chip Microcomputer/Microcontroller",
    "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/76a8ad4a0d656efffe20d60a0802004a.pdf",
    "parts": {
      "symbol": "fm33lg023a.kicad_sym",
      "footprint": "fm33lg023a.kicad_mod",
      "model_3d": "fm33lg023a-hero.glb",
      "model_3d_plain": "fm33lg023a-etched.glb",
      "model_3d_step": "fm33lg023a-etched.step",
      "model_3d_step_plain": "fm33lg023a.step",
      "lbr": "fm33lg023a.lbr"
    },
    "distributor_links": {
      "lcsc": "C5244095"
    },
    "distributor_check": {
      "checked_at": "2026-10-22T22:48:20Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "deferred",
        "error": "shared DigiKey quota guard: 877 calls left today"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PD8",
        "type": "bidirectional",
        "description": "GPIO that also serves as UART3_TX and SWIO (SWD data)."
      },
      {
        "number": "2",
        "name": "NRST",
        "type": "input",
        "description": "Reset pin with 5 kΩ typical pull-up, VIL max 0.3VDD, VIH min 0.7VDD."
      },
      {
        "number": "3",
        "name": "PA13",
        "type": "bidirectional",
        "description": "GPIO with UART0_RX, LPUART0_RX and ADC_IN4 functions."
      },
      {
        "number": "4",
        "name": "PA14",
        "type": "bidirectional",
        "description": "GPIO with UART0_TX, LPUART0_TX and ADC_IN11 functions."
      },
      {
        "number": "5",
        "name": "PA6",
        "type": "bidirectional",
        "description": "GPIO with COM6/SEG30 LCD drive, OPA1_INN2 and CAN_RX functions."
      },
      {
        "number": "6",
        "name": "PA7",
        "type": "bidirectional",
        "description": "GPIO with COM7/SEG31 LCD drive, OPA1_INP2 and CAN_TX functions."
      },
      {
        "number": "7",
        "name": "PA8",
        "type": "bidirectional",
        "description": "GPIO with SEG0 LCD, LPT32_CH1, SPI1_SSN and COMP2_INP1 functions."
      },
      {
        "number": "8",
        "name": "PA9",
        "type": "bidirectional",
        "description": "GPIO with SEG1 LCD, LPT32_CH2, SPI1_SCK and COMP2_INP2 functions; the QFN32 figure shows PA11 (SEG32/SCL/LPUART2_RX) sharing this pin."
      },
      {
        "number": "9",
        "name": "PB0",
        "type": "bidirectional",
        "description": "GPIO with SEG34 LCD, UART3_RX, SPI1_MISO and OPA1_OUT3 functions; the QFN32 figure shows PA12 (SEG33/SDA/LPUART2_TX) sharing this pin."
      },
      {
        "number": "10",
        "name": "PB1",
        "type": "bidirectional",
        "description": "Pin with SEG35 LCD, UART3_TX, SPI1_MOSI and OPA1_OUT4 functions."
      },
      {
        "number": "11",
        "name": "PB4",
        "type": "bidirectional",
        "description": "GPIO with SEG3 LCD, ATIM_CH1, LPUART2_RX and COMP3_INN1 functions."
      },
      {
        "number": "12",
        "name": "PB5",
        "type": "bidirectional",
        "description": "GPIO with SEG4 LCD, ATIM_CH2, LPUART2_TX and COMP3_INN2 functions."
      },
      {
        "number": "13",
        "name": "PB7",
        "type": "bidirectional",
        "description": "GPIO with SEG6 LCD, ATIM_CH4, SPI2_SCK and ANATST (factory test) functions; PB8 (SEG7/SPI0_SSN/ATIM_CH3N/COMP1_INP1) shares this pin in the QFN32 figure."
      },
      {
        "number": "14",
        "name": "PB10",
        "type": "bidirectional",
        "description": "GPIO with SEG9 LCD, OPA1_INN1, SPI0_MISO and GPT0_CH1 functions."
      },
      {
        "number": "15",
        "name": "PB11",
        "type": "bidirectional",
        "description": "GPIO with SEG10 LCD, OPA1_INP1, SPI MOSI and GPT0_CH2 functions."
      },
      {
        "number": "16",
        "name": "PB12",
        "type": "bidirectional",
        "description": "GPIO with WKUP3 wake-up, FOUT1 clock output, ATIM_ETR and OPA1_OUT1 functions; PE1 (SEG37/SPI0_SCK) shares this pin in the QFN32 figure."
      },
      {
        "number": "17",
        "name": "PC2",
        "type": "bidirectional",
        "description": "GPIO with XTHIN high-frequency crystal input, UART1_RX and LPUART1_RX; PD12 (VDISP1/SDA/SPI2_MOSI) shares this pin in the QFN32 figure."
      },
      {
        "number": "18",
        "name": "PC3",
        "type": "bidirectional",
        "description": "GPIO with XTHOUT high-frequency crystal output, UART1_TX and LPUART1_TX functions."
      },
      {
        "number": "19",
        "name": "PC5",
        "type": "bidirectional",
        "description": "GPIO with SEG14 LCD, DAC_OUT, COMP2_OUT and UART5_TX functions (ESD HBM rating ±2000 V on DAC_OUT)."
      },
      {
        "number": "20",
        "name": "PC7",
        "type": "bidirectional",
        "description": "GPIO with SEG16 LCD, SPI2_SSN and ADC_IN6 functions."
      },
      {
        "number": "21",
        "name": "PC8",
        "type": "bidirectional",
        "description": "GPIO with SEG17 LCD, SPI2_SCK and ADC_IN13 functions."
      },
      {
        "number": "22",
        "name": "PC9",
        "type": "bidirectional",
        "description": "GPIO with SEG18 LCD, SPI2_MISO and ADC_IN14 functions."
      },
      {
        "number": "23",
        "name": "PC10",
        "type": "bidirectional",
        "description": "GPIO with WKUP5 wake-up, SEG19 LCD, SPI2_MOSI and ADC_IN15 functions."
      },
      {
        "number": "24",
        "name": "XT32KO",
        "type": "output",
        "description": "32768 Hz crystal oscillator output pin."
      },
      {
        "number": "25",
        "name": "XT32KI",
        "type": "input",
        "description": "32768 Hz crystal oscillator input pin."
      },
      {
        "number": "26",
        "name": "VDD15",
        "type": "power_out",
        "description": "LDO output, connect a 100 nF capacitor to ground."
      },
      {
        "number": "27",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground (also VSSA)."
      },
      {
        "number": "28",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply (also VDDA), operating range 1.65 V to 5.5 V."
      },
      {
        "number": "29",
        "name": "VREFP",
        "type": "passive",
        "description": "Reference voltage pin."
      },
      {
        "number": "30",
        "name": "PD11",
        "type": "bidirectional",
        "description": "GPIO with WKUP6 wake-up, FOUT0 clock output, ATIM_BRK1 and ADC_IN0 functions; PD0 (SEG22/UART5_RX/GPT2_CH1/ADC_IN7) shares this pin in the QFN32 figure."
      },
      {
        "number": "31",
        "name": "PD1",
        "type": "bidirectional",
        "description": "GPIO with SEG23 LCD, UART5_TX, GPT2_CH2 and ADC_IN1 functions; PD6 (WKUP7/ANATST/ATIM_BRK2/ADC_IN10) shares this pin per the QFN32 figure."
      },
      {
        "number": "32",
        "name": "PD7",
        "type": "bidirectional",
        "description": "GPIO that also serves as UART3_RX and SWCLK (SWD clock)."
      },
      {
        "number": "33",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Several QFN32 pins are shared by two GPIOs, shown in parentheses in the package figure (page 42). Ta; Table 2-1 lists PB1 with the function 'external wake-up pin' where it should list GPIO, which looks ; Table 2-1 lists PB11 with SPI1_MOSI, but the package figures show SPI0_MOSI. The datasheet is incons"
        ],
        "pages_sent": 64,
        "cost_usd": 0.5935,
        "at": "2026-10-22T22:48:06"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/76a8ad4a0d656efffe20d60a0802004a.pdf",
        "pages": 100,
        "sha256": "bfd0cc3c1ded70af",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "fm33lg023a.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "fm33lg023a-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "df2088f8c6a7544b168f73106149d8dcd7f119584139a259ee2a3a68b846b9e6",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}