component
FH4811
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XIN FEI HONG MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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FH4811
XIN FEI HONG · MOSFETs · SO-8
FH4811 from XIN FEI HONG, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET, pin 1 at the dot-marked corner of the SO-8 top view. |
| 2 | S | passive | Source of the N-channel MOSFET, tied with the other source pins. |
| 3 | S | passive | Source of the N-channel MOSFET, tied with the other source pins. |
| 4 | G | input | Gate of the N-channel MOSFET; VGS maximum ±20V, threshold 1V to 2V at ID=1mA. |
| 5 | D | passive | Drain of the N-channel MOSFET; VDS maximum 30V, ID 11A at TA=25°C. |
| 6 | D | passive | Drain of the N-channel MOSFET, tied with the other drain pins. |
| 7 | D | passive | Drain of the N-channel MOSFET, tied with the other drain pins. |
| 8 | D | passive | Drain of the N-channel MOSFET, tied with the other drain pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XIN FEI HONG |
| Package | SO-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 30 | V | 1 | |||
| Gate-Source Voltage | VGS | 20 | V | 1 | |||
| Drain Current, VGS @ 10V (TA=25℃) | ID@TA=25℃ | 11 | A | VGS @ 10V | 1 | ||
| Drain Current, VGS @ 10V (TA=70℃) | ID@TA=70℃ | 8.7 | A | VGS @ 10V | 1 | ||
| Pulsed Drain Current | IDM | 44 | A | 1 | |||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Maximum Thermal Resistance, Junction-ambient | Rthj-a | 62.5 | ℃/W | Surface mounted on 1 in2 copper pad of FR4 board, t<10sec | 1 | ||
| Maximum Thermal Resistance, Junction-ambient (minimum copper pad) | Rthj-a | 135 | ℃/W | Mounted on minimum copper pad (note 3) | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | 30 | V | VGS=0V, ID=250uA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 8 | 11.5 | mΩ | VGS=10V, ID=10A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 13 | 18 | mΩ | VGS=4.5V, ID=5A | 2 | |
| Gate Threshold Voltage | VGS(th) | 1 | 2 | V | VDS=VGS, ID=1mA | 2 | |
| Drain-Source Leakage Current | IDSS | 1 | uA | VDS=24V, VGS=0V | 2 | ||
| Gate-Source Leakage | IGSS | 100 | nA | VGS=+20V, VDS=0V | 2 | ||
| Total Gate Charge | Qg | 14 | 22.4 | nC | ID=5A | 2 | |
| Input Capacitance | Ciss | 790 | 1280 | pF | VGS=0V | 2 | |
| Gate Resistance | Rg | 2.5 | 5 | Ω | f=1.0MHz | 2 | |
| Forward On Voltage | VSD | 1.2 | V | IS=1.7A, VGS=0V | 2 |
CAD (KiCad official)
- Symbol:
FH4811 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
fh4811-etched.step/fh4811-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fh4811.step/fh4811.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XIN FEI HONG datasheet (5 pp, sha256
4d61255e27469be7, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FH4811
**XIN FEI HONG** · MOSFETs · SO-8
FH4811 from XIN FEI HONG, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET, pin 1 at the dot-marked corner of the SO-8 top view. |
| 2 | S | passive | Source of the N-channel MOSFET, tied with the other source pins. |
| 3 | S | passive | Source of the N-channel MOSFET, tied with the other source pins. |
| 4 | G | input | Gate of the N-channel MOSFET; VGS maximum ±20V, threshold 1V to 2V at ID=1mA. |
| 5 | D | passive | Drain of the N-channel MOSFET; VDS maximum 30V, ID 11A at TA=25°C. |
| 6 | D | passive | Drain of the N-channel MOSFET, tied with the other drain pins. |
| 7 | D | passive | Drain of the N-channel MOSFET, tied with the other drain pins. |
| 8 | D | passive | Drain of the N-channel MOSFET, tied with the other drain pins. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XIN FEI HONG |
| Package | SO-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 30 | V | | 1 |
| Gate-Source Voltage | VGS | | | 20 | V | | 1 |
| Drain Current, VGS @ 10V (TA=25℃) | ID@TA=25℃ | | | 11 | A | VGS @ 10V | 1 |
| Drain Current, VGS @ 10V (TA=70℃) | ID@TA=70℃ | | | 8.7 | A | VGS @ 10V | 1 |
| Pulsed Drain Current | IDM | | | 44 | A | | 1 |
| Storage Temperature Range | TSTG | -55 | | 150 | ℃ | | 1 |
| Operating Junction Temperature Range | TJ | -55 | | 150 | ℃ | | 1 |
| Maximum Thermal Resistance, Junction-ambient | Rthj-a | | | 62.5 | ℃/W | Surface mounted on 1 in2 copper pad of FR4 board, t<10sec | 1 |
| Maximum Thermal Resistance, Junction-ambient (minimum copper pad) | Rthj-a | | | 135 | ℃/W | Mounted on minimum copper pad (note 3) | 2 |
| Drain-Source Breakdown Voltage | BVDSS | 30 | | | V | VGS=0V, ID=250uA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 8 | 11.5 | mΩ | VGS=10V, ID=10A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 13 | 18 | mΩ | VGS=4.5V, ID=5A | 2 |
| Gate Threshold Voltage | VGS(th) | 1 | | 2 | V | VDS=VGS, ID=1mA | 2 |
| Drain-Source Leakage Current | IDSS | | | 1 | uA | VDS=24V, VGS=0V | 2 |
| Gate-Source Leakage | IGSS | | | 100 | nA | VGS=+20V, VDS=0V | 2 |
| Total Gate Charge | Qg | | 14 | 22.4 | nC | ID=5A | 2 |
| Input Capacitance | Ciss | | 790 | 1280 | pF | VGS=0V | 2 |
| Gate Resistance | Rg | | 2.5 | 5 | Ω | f=1.0MHz | 2 |
| Forward On Voltage | VSD | | | 1.2 | V | IS=1.7A, VGS=0V | 2 |
## CAD (KiCad official)
- Symbol: `FH4811`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `fh4811-etched.step` / `fh4811-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fh4811.step` / `fh4811.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [XIN FEI HONG datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588945989701152768) (5 pp, sha256 `4d61255e27469be7`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fh4811-datasheet.pdf)