# FDS89161LZ

**onsemi** · MOSFETs · SO-8

FDS89161LZ from onsemi, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of Q1 (N-channel, 100 V VDS rating). |
| 2 | G1 | input | Gate of Q1, logic-level with integrated G-S ESD zener diode, VGS rated ±20 V. |
| 3 | S2 | passive | Source of Q2 (N-channel, 100 V VDS rating). |
| 4 | G2 | input | Gate of Q2, logic-level with integrated G-S ESD zener diode, VGS rated ±20 V. |
| 5 | D2 | passive | Drain of Q2, continuous drain current 2.7 A, pulsed 15 A. |
| 6 | D2 | passive | Drain of Q2, continuous drain current 2.7 A, pulsed 15 A. |
| 7 | D1 | passive | Drain of Q1, continuous drain current 2.7 A, pulsed 15 A. |
| 8 | D1 | passive | Drain of Q1, continuous drain current 2.7 A, pulsed 15 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain to Source Breakdown Voltage | BVDSS | 100 |  |  | V | ID = 250 µA, VGS = 0 V | 3 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | µA | VDS = 80 V, VGS = 0 V | 3 |
| Gate to Source Leakage Current | IGSS | -10 |  | 10 | µA | VGS = ±20 V, VDS = 0 V | 3 |
| Gate to Source Threshold Voltage | VGS(th) | 1 | 1.7 | 2.2 | V | VGS = VDS, ID = 250 µA | 3 |
| Static Drain to Source On Resistance | rDS(on) |  | 81 | 105 | mΩ | VGS = 10 V, ID = 2.7 A | 3 |
| Static Drain to Source On Resistance | rDS(on) |  | 110 | 160 | mΩ | VGS = 4.5 V, ID = 2.1 A | 3 |
| Static Drain to Source On Resistance | rDS(on) |  | 140 | 182 | mΩ | VGS = 10 V, ID = 2.7 A, TJ = 125 °C | 3 |
| Input Capacitance | Ciss |  | 227 | 302 | pF | VDS = 50 V, VGS = 0 V, f = 1MHz | 3 |
| Output Capacitance | Coss |  | 44 | 58 | pF | VDS = 50 V, VGS = 0 V, f = 1MHz | 3 |
| Reverse Transfer Capacitance | Crss |  | 3 | 4 | pF | VDS = 50 V, VGS = 0 V, f = 1MHz | 3 |
| Turn-On Delay Time | td(on) |  | 3.8 | 10 | ns | VDD = 50 V, ID = 2.7 A, VGS = 10 V, RGEN = 6 Ω | 3 |
| Rise Time | tr |  | 1.2 | 10 | ns | VDD = 50 V, ID = 2.7 A, VGS = 10 V, RGEN = 6 Ω | 3 |
| Turn-Off Delay Time | td(off) |  | 9.5 | 17 | ns | VDD = 50 V, ID = 2.7 A, VGS = 10 V, RGEN = 6 Ω | 3 |
| Fall Time | tf |  | 1.6 | 10 | ns | VDD = 50 V, ID = 2.7 A, VGS = 10 V, RGEN = 6 Ω | 3 |
| Total Gate Charge | Qg(TOT) |  | 3.8 | 5.3 | nC | VGS = 0 V to 10 V, VDD = 50 V, ID = 2.7 A | 3 |
| Total Gate Charge | Qg(TOT) |  | 2.1 | 2.9 | nC | VGS = 0 V to 5 V, VDD = 50 V, ID = 2.7 A | 3 |
| Source to Drain Diode Forward Voltage | VSD |  | 0.8 | 1.3 | V | VGS = 0 V, IS = 2.7 A (Note 2) | 3 |
| Source to Drain Diode Forward Voltage | VSD |  | 0.8 | 1.2 | V | VGS = 0 V, IS = 2 A (Note 2) | 3 |
| Reverse Recovery Time | trr |  | 31 | 56 | ns | IF = 2.7 A, di/dt = 100 A/µs | 3 |
| Reverse Recovery Charge | Qrr |  | 20 | 36 | nC | IF = 2.7 A, di/dt = 100 A/µs | 3 |
| Drain to Source Voltage | VDS |  |  | 100 | V |  | 2 |
| Gate to Source Voltage | VGS | -20 |  | 20 | V |  | 2 |
| Drain Current Continuous | ID |  |  | 2.7 | A |  | 2 |
| Drain Current Pulsed | ID |  |  | 15 | A | Pulsed | 2 |
| Single Pulse Avalanche Energy | EAS |  |  | 13 | mJ | Note 3 | 2 |
| Power Dissipation | PD |  |  | 31 | W | TC = 25 °C | 2 |
| Power Dissipation | PD |  |  | 1.6 | W | TA = 25 °C (Note 1a) | 2 |
| Operating and Storage Junction Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 2 |
| Thermal Resistance, Junction to Case | RθJC |  | 40 |  | °C/W | Note 1 | 2 |
| Thermal Resistance, Junction to Ambient | RθJA |  | 78 |  | °C/W | Note 1a: 1 in² pad of 2 oz copper | 2 |

## CAD (KiCad official)

- Symbol: `FDS89161LZ`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `fds89161lz-etched.step` / `fds89161lz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fds89161lz.step` / `fds89161lz.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586187202782617600) (8 pp, sha256 `a91f4b06b448641e`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/fds89161lz-datasheet.pdf)