# FDS4559

**onsemi** · MOSFETs · SO-8

FDS4559 from onsemi, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Q1 (N-channel) source terminal; Q1 is rated 60 V VDSS and 4.5 A continuous drain current. |
| 2 | G1 | input | Q1 (N-channel) gate terminal; gate-source voltage is rated to ±20 V (VGSS). |
| 3 | S2 | passive | Q2 (P-channel) source terminal; Q2 is rated -60 V VDSS and -3.5 A continuous drain current. |
| 4 | G2 | input | Q2 (P-channel) gate terminal; gate-source voltage is rated to ±20 V (VGSS). |
| 5 | D2 | passive | Q2 (P-channel) drain terminal; operating and storage junction temperature range is -55 to +175 °C. |
| 6 | D2 | passive | Q2 (P-channel) drain terminal, internally common with pin 5; pulsed drain current is rated -20 A. |
| 7 | D1 | passive | Q1 (N-channel) drain terminal, internally common with pin 8; pulsed drain current is rated 20 A. |
| 8 | D1 | passive | Q1 (N-channel) drain terminal; continuous drain current is rated 4.5 A (Note 1a). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SO-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage (Q1, N-channel) | VDSS |  |  | 60 | V |  | 2 |
| Drain-Source Voltage (Q2, P-channel) | VDSS | -60 |  |  | V |  | 2 |
| Gate-Source Voltage (Q1) | VGSS | -20 |  | 20 | V |  | 2 |
| Gate-Source Voltage (Q2) | VGSS | -20 |  | 20 | V |  | 2 |
| Drain Current - Continuous (Q1) | ID |  |  | 4.5 | A | Note 1a | 2 |
| Drain Current - Continuous (Q2) | ID | -3.5 |  |  | A | Note 1a | 2 |
| Drain Current - Pulsed (Q1) | ID |  |  | 20 | A | Pulsed | 2 |
| Drain Current - Pulsed (Q2) | ID | -20 |  |  | A | Pulsed | 2 |
| Power Dissipation for Dual Operation | PD |  |  | 2 | W | Dual operation | 2 |
| Power Dissipation for Single Operation | PD |  |  | 1.6 | W | Single operation (Note 1a) | 2 |
| Power Dissipation for Single Operation | PD |  |  | 1.2 | W | Single operation (Note 1b) | 2 |
| Power Dissipation for Single Operation | PD |  |  | 1 | W | Single operation (Note 1c) | 2 |
| Operating and Storage Junction Temperature Range | TJ, TSTG | -55 |  | 175 | °C |  | 2 |
| Drain-Source Breakdown Voltage (Q1) | BVDSS | 60 |  |  | V | VGS = 0 V, ID = 250 µA | 3 |
| Drain-Source Breakdown Voltage (Q2) | BVDSS | -60 |  |  | V | VGS = 0 V, ID = -250 µA | 3 |
| Zero Gate Voltage Drain Current (Q1) | IDSS |  |  | 1 | µA | VDS = 48 V, VGS = 0 V | 3 |
| Zero Gate Voltage Drain Current (Q2) | IDSS |  |  | -1 | µA | VDS = -48 V, VGS = 0 V | 3 |
| Gate-Body Leakage (Q1) | IGSS |  |  | 100 | nA | VGS = +20 V, VDS = 0 V | 3 |
| Gate-Body Leakage (Q2) | IGSS |  |  | 100 | nA | VGS = +20 V, VDS = 0 V | 3 |
| Gate Threshold Voltage (Q1) | VGS(th) | 1 | 2.2 | 3 | V | VDS = VGS, ID = 250 µA | 3 |
| Gate Threshold Voltage (Q2) | VGS(th) | -1 | -1.6 | -3 | V | VDS = VGS, ID = -250 µA | 3 |
| Static Drain-Source On-Resistance (Q1) | RDS(on) |  | 42 | 55 | mΩ | VGS = 10 V, ID = 4.5 A | 3 |
| Static Drain-Source On-Resistance (Q1) | RDS(on) |  | 72 | 94 | mΩ | VGS = 10 V, ID = 4.5 A, TJ = 125°C | 3 |
| Static Drain-Source On-Resistance (Q1) | RDS(on) |  | 55 | 75 | mΩ | VGS = 4.5 V, ID = 4 A | 3 |
| Static Drain-Source On-Resistance (Q2) | RDS(on) |  | 82 | 105 | mΩ | VGS = -10 V, ID = -3.5 A | 3 |
| Static Drain-Source On-Resistance (Q2) | RDS(on) |  | 130 | 190 | mΩ | VGS = -10 V, ID = -3.5 A, TJ = 125°C | 3 |
| Static Drain-Source On-Resistance (Q2) | RDS(on) |  | 105 | 135 | mΩ | VGS = -4.5 V, ID = -3.1 A | 3 |
| On-State Drain Current (Q1) | ID(on) | 20 |  |  | A | VGS = 10 V, VDS = 5 V | 3 |
| On-State Drain Current (Q2) | ID(on) | -20 |  |  | A | VGS = -10 V, VDS = -5 V | 3 |
| Turn-On Delay Time (Q1) | td(on) |  | 11 | 20 | ns | VDD = 30 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 3 |
| Turn-On Delay Time (Q2) | td(on) |  | 7 | 14 | ns | VDD = -30 V, ID = -1 A, VGS = -10 V, RGEN = 6 Ω | 3 |
| Turn-On Rise Time (Q1) | tr |  | 8 | 18 | ns | VDD = 30 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 3 |
| Turn-On Rise Time (Q2) | tr |  | 10 | 20 | ns | VDD = -30 V, ID = -1 A, VGS = -10 V, RGEN = 6 Ω | 3 |
| Turn-Off Delay Time (Q1) | td(off) |  | 19 | 35 | ns | VDD = 30 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 3 |
| Turn-Off Delay Time (Q2) | td(off) |  | 19 | 34 | ns | VDD = -30 V, ID = -1 A, VGS = -10 V, RGEN = 6 Ω | 3 |
| Turn-Off Fall Time (Q1) | tf |  | 6 | 15 | ns | VDD = 30 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 3 |
| Turn-Off Fall Time (Q2) | tf |  | 12 | 22 | ns | VDD = -30 V, ID = -1 A, VGS = -10 V, RGEN = 6 Ω | 3 |
| Total Gate Charge (Q1) | Qg |  | 12.5 | 18 | nC | VDS = 30 V, ID = 4.5 A, VGS = 10 V | 3 |
| Total Gate Charge (Q2) | Qg |  | 15 | 21 | nC | VDS = -30 V, ID = -3.5 A, VGS = -10V | 3 |
| Maximum Continuous Drain-Source Diode Forward Current (Q1) | IS |  |  | 1.3 | A |  | 4 |
| Maximum Continuous Drain-Source Diode Forward Current (Q2) | IS |  |  | -1.3 | A |  | 4 |
| Drain-Source Diode Forward Voltage (Q1) | VSD |  | 0.8 | 1.2 | V | VGS = 0 V, IS = 1.3 A (Note 2) | 4 |
| Drain-Source Diode Forward Voltage (Q2) | VSD |  | -0.8 | -1.2 | V | VGS = 0 V, IS = -1.3 A (Note 2) | 4 |
| Thermal Resistance, Junction-to-Ambient | RθJA |  | 78 |  | °C/W | Note 1a | 2 |
| Thermal Resistance, Junction-to-Case | RθJC |  | 40 |  | °C/W | Note 1 | 2 |
| Single Pulse Drain-Source Avalanche Energy (Q1) | WDSS |  | 90 |  | mJ | VDD = 30 V, ID = 4.5 A | 3 |
| Maximum Drain-Source Avalanche Current (Q1) | IAR |  | 4.5 |  | A |  | 3 |
| Breakdown Voltage Temperature Coefficient (Q1) | ∆BVDSS/∆TJ |  | 58 |  | mV/°C | ID = 250 µA, Referenced to 25°C | 3 |
| Breakdown Voltage Temperature Coefficient (Q2) | ∆BVDSS/∆TJ |  | -49 |  | mV/°C | ID = -250 µA, Referenced to 25°C | 3 |
| Gate Threshold Voltage Temperature Coefficient (Q1) | ∆VGS(th)/∆TJ |  | -5.5 |  | mV/°C | ID = 250 µA, Referenced to 25°C | 3 |
| Gate Threshold Voltage Temperature Coefficient (Q2) | ∆VGS(th)/∆TJ |  | 4 |  | mV/°C | ID = -250 µA, Referenced to 25°C | 3 |
| Forward Transconductance (Q1) | gFS |  | 14 |  | S | VDS = 10 V, ID = 4.5 A | 3 |
| Forward Transconductance (Q2) | gFS |  | 9 |  | S | VDS = -5 V, ID = -3 5 A | 3 |
| Input Capacitance (Q1) | Ciss |  | 650 |  | pF |  | 3 |
| Input Capacitance (Q2) | Ciss |  | 759 |  | pF |  | 3 |
| Output Capacitance (Q1) | Coss |  | 80 |  | pF |  | 3 |
| Output Capacitance (Q2) | Coss |  | 90 |  | pF |  | 3 |
| Reverse Transfer Capacitance (Q1) | Crss |  | 35 |  | pF | VDS = 25 V, VGS = 0 V, f = 1.0 MHz | 3 |
| Reverse Transfer Capacitance (Q2) | Crss |  | 39 |  | pF | VDS = -30 V, VGS = 0 V, f = 1.0 MHz | 3 |

## CAD (KiCad official)

- Symbol: `FDS4559`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `fds4559-etched.step` / `fds4559-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fds4559.step` / `fds4559.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586196430092034048) (10 pp, sha256 `301a69b67914a625`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/fds4559-datasheet.pdf)