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Ray Publish 0.1.0 4ff8dc8 6h ago

FDS3512

onsemi · MOSFETs · SOP-8

FDS3512 from onsemi, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the 80 V N-channel MOSFET, tied to the body diode anode (continuous diode current up to 2.1 A).
2 S passive Source of the 80 V N-channel MOSFET, tied to the body diode anode (continuous diode current up to 2.1 A).
3 S passive Source of the 80 V N-channel MOSFET, tied to the body diode anode (continuous diode current up to 2.1 A).
4 G input Gate of the N-channel MOSFET, rated for ±20 V gate-source voltage with a 2 to 4 V threshold at 250 µA.
5 D passive Drain of the MOSFET, rated for 80 V drain-source and 4.0 A continuous (30 A pulsed) drain current.
6 D passive Drain of the MOSFET, rated for 80 V drain-source and 4.0 A continuous (30 A pulsed) drain current.
7 D passive Drain of the MOSFET, rated for 80 V drain-source and 4.0 A continuous (30 A pulsed) drain current.
8 D passive Drain of the MOSFET, rated for 80 V drain-source and 4.0 A continuous (30 A pulsed) drain current.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 80 V TA=25°C 2
Gate-Source Voltage VGSS -20 20 V TA=25°C 2
Drain Current Continuous ID 4 A Note 1a 2
Drain Current Pulsed ID 30 A Pulsed 2
Power Dissipation Single Operation PD 2.5 W Note 1a 2
Power Dissipation Single Operation PD 1.2 W Note 1b 2
Power Dissipation Single Operation PD 1 W Note 1c 2
Operating and Storage Junction Temperature Range TJ, TSTG -55 175 °C 2
Thermal Resistance, Junction-to-Ambient RθJA 50 °C/W Note 1a 2
Thermal Resistance, Junction-to-Case RθJC 25 °C/W Note 1 2
Single Pulse Drain-Source Avalanche Energy WDSS 90 mJ VDD = 40 V, ID = 4.0 A 3
Maximum Drain-Source Avalanche Current IAR 4 A 3
Drain-Source Breakdown Voltage BVDSS 80 V VGS = 0 V, ID = 250 µA 3
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 64 V, VGS = 0 V 3
Gate-Body Leakage, Forward IGSSF 100 nA VGS = 20 V, VDS = 0 V 3
Gate-Body Leakage, Reverse IGSSR -100 nA VGS = -20 V, VDS = 0 V 3
Gate Threshold Voltage VGS(th) 2 2.4 4 V VDS = VGS, ID = 250 µA 3
Static Drain-Source On-Resistance RDS(on) 50 70 mΩ VGS = 10 V, ID = 4.0 A 3
Static Drain-Source On-Resistance RDS(on) 55 80 mΩ VGS = 6 V, ID = 3.7A 3
Static Drain-Source On-Resistance RDS(on) 91 135 mΩ VGS = 10 V, ID = 4.0 A, TJ = 125°C 3
On-State Drain Current ID(on) 20 A VGS = 10 V, VDS = 5 V 3
Turn-On Delay Time td(on) 7 14 ns VDD = 40 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 3
Turn-On Rise Time tr 3 6 ns VDD = 40 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 3
Turn-Off Delay Time td(off) 24 38 ns VDD = 40 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 3
Turn-Off Fall Time tf 4 8 ns VDD = 40 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 3
Total Gate Charge Qg 13 18 nC VDS = 40 V, ID = 4.0 A, VGS = 10 V 3
Maximum Continuous Drain-Source Diode Forward Current IS 2.1 A 3
Drain-Source Diode Forward Voltage VSD 0.8 1.2 V VGS = 0 V, IS = 2.1 A (Note 2) 3
Breakdown Voltage Temperature Coefficient ΔBVDSS/ΔTJ 80 mV/°C ID = 250 µA, Referenced to 25°C 3
Gate Threshold Voltage Temperature Coefficient ΔVGS(th)/ΔTJ -6 mV/°C ID = 250 µA, Referenced to 25°C 3
Forward Transconductance GFS 14 S VGS = 10 V, ID = 4.0 A 3
Input Capacitance Ciss 634 pF VDS = 40 V, VGS = 0 V, f = 1.0 MHz 3
Output Capacitance Coss 58 pF VDS = 40 V, VGS = 0 V, f = 1.0 MHz 3
Reverse Transfer Capacitance Crss 28 pF VDS = 40 V, VGS = 0 V, f = 1.0 MHz 3
Gate-Source Charge Qgs 2.4 nC VDS = 40 V, ID = 4.0 A, VGS = 10 V 3
Gate-Drain Charge Qgd 2.8 nC VDS = 40 V, ID = 4.0 A, VGS = 10 V 3

CAD (KiCad official)

  • Symbol: FDS3512
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: fds3512-etched.step / fds3512-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fds3512.step / fds3512.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 3c2ef4fba2f4fae4, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF