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FDP075N15A-F102

onsemi · MOSFETs · TO-220

FDP075N15A-F102 from onsemi, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the MOSFET; gate-to-source voltage is rated ±20 V DC and ±30 V AC (f > 1 Hz).
2 D passive Drain of the MOSFET; rated 150 V drain-to-source (VDSS) with 130 A continuous drain current at TC = 25°C, and the package limits current to 120 A.
3 S passive Source of the MOSFET; maximum continuous body diode forward current is 130 A and maximum pulsed diode forward current is 520 A.

Key specifications

Parameter Value
Manufacturer onsemi
Package TO-220
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain to Source Voltage VDSS 150 V 2
Gate to Source Voltage DC VGSS -20 20 V DC 2
Gate to Source Voltage AC VGSS -30 30 V AC (f > 1 Hz) 2
Drain Current - Continuous ID 130 A TC = 25°C; *Package limitation current is 120 A 2
Drain Current - Continuous ID 92 A TC = 100°C 2
Drain Current - Pulsed IDM 522 A Note 1: pulse-width limited by maximum junction temperature 2
Single Pulsed Avalanche Energy EAS 588 mJ Note 2: Starting TJ = 25°C, L = 3 mH, IAS = 19.8 A 2
Peak Diode Recovery dv/dt dv/dt 6 V/ns Note 3: ISD ≤ 100 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C 2
Power Dissipation PD 333 W TC = 25°C 2
Operating and Storage Temperature Range TJ, TSTG -55 175 °C 2
Maximum Lead Temperature for Soldering TL 300 °C 1/8 in from case for 5 seconds 2
Thermal Resistance, Junction to Case RθJC 0.45 °C/W Max. 2
Thermal Resistance, Junction to Ambient RθJA 62.5 °C/W Minimum pad of 2-oz copper, Max. 2
Drain to Source Breakdown Voltage BVDSS 150 V ID = 250 μA, VGS = 0 V 3
Zero Gate Voltage Drain Current IDSS 1 μA VDS = 120 V, VGS = 0 V 3
Zero Gate Voltage Drain Current IDSS 500 μA VDS = 120 V, TC = 150°C 3
Gate to Body Leakage Current IGSS -100 100 nA VGS = ±20 V, VDS = 0 V 3
Gate Threshold Voltage VGS(th) 2 4 V VGS = VDS, ID = 250 μA 3
Static Drain to Source On Resistance RDS(on) 6.25 7.5 mΩ VGS = 10 V, ID = 100 A 3
Input Capacitance Ciss 5525 7350 pF VDS = 75 V, VGS = 0 V, f = 1 MHz 3
Output Capacitance Coss 516 685 pF VDS = 75 V, VGS = 0 V, f = 1 MHz 3
Total Gate Charge at 10V Qg(tot) 77 100 nC VDS = 75 V, ID = 100 A, VGS = 10 V (Note 4) 3
Turn-On Delay Time td(on) 28 66 ns VDD = 75 V, ID = 100 A, VGS = 10 V, RG = 4.7 Ω (Note 4) 3
Turn-On Rise Time tr 37 84 ns VDD = 75 V, ID = 100 A, VGS = 10 V, RG = 4.7 Ω (Note 4) 3
Turn-Off Delay Time td(off) 62 134 ns VDD = 75 V, ID = 100 A, VGS = 10 V, RG = 4.7 Ω (Note 4) 3
Turn-Off Fall Time tf 21 52 ns VDD = 75 V, ID = 100 A, VGS = 10 V, RG = 4.7 Ω (Note 4) 3
Maximum Continuous Drain to Source Diode Forward Current IS 130 A 3
Maximum Pulsed Drain to Source Diode Forward Current ISM 520 A 3
Drain to Source Diode Forward Voltage VSD 1.25 V VGS = 0 V, ISD = 100 A 3

CAD (KiCad official)

  • Symbol: FDP075N15A-F102
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: fdp075n15a-f102-etched.step / fdp075n15a-f102-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdp075n15a-f102.step / fdp075n15a-f102.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 082615d9ae9a5b5f, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF