component
FDG6323L-TP
Public Made by Adomby adom
TECH PUBLIC Power Distribution Switches, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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FDG6323L-TP
TECH PUBLIC · Power Distribution Switches · SOT-363
FDG6323L-TP from TECH PUBLIC, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R2 | passive | Source of Q1 (ON/OFF control FET) with optional slew-rate control resistor R2 (typical 0 to 100kΩ) to GND. |
| 2 | D2 | passive | Drain of Q2 (load output, VOUT), tied to pin 3; Q2 drain-source voltage rating is -20 V and continuous load current 1.3 A. |
| 3 | D2 | passive | Drain of Q2 (load output, VOUT), tied to pin 2; Q2 drain-source voltage rating is -20 V and continuous load current 1.3 A. |
| 4 | S2 | power_in | Source of Q2 (input VIN side of the load switch); input voltage range is 20 V maximum. |
| 5 | ON/OFF | input | On/off control input to the gate of Q1, with a voltage range of 8 V maximum and 2 kV HBM ESD rating. |
| 6 | R1,C1 | passive | Q1 drain and Q2 gate node, where pull-up resistor R1 (typical 10kΩ to 1MΩ) and optional slew-rate capacitor C1 (typical 1000pF) connect. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-363 |
| Category | Power Management (PMIC) |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
FDG6323L-TP - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
fdg6323l-tp-etched.step/fdg6323l-tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fdg6323l-tp.step/fdg6323l-tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TECH PUBLIC datasheet (5 pp, sha256
745705309b17dc2a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FDG6323L-TP
**TECH PUBLIC** · Power Distribution Switches · SOT-363
FDG6323L-TP from TECH PUBLIC, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R2 | passive | Source of Q1 (ON/OFF control FET) with optional slew-rate control resistor R2 (typical 0 to 100kΩ) to GND. |
| 2 | D2 | passive | Drain of Q2 (load output, VOUT), tied to pin 3; Q2 drain-source voltage rating is -20 V and continuous load current 1.3 A. |
| 3 | D2 | passive | Drain of Q2 (load output, VOUT), tied to pin 2; Q2 drain-source voltage rating is -20 V and continuous load current 1.3 A. |
| 4 | S2 | power_in | Source of Q2 (input VIN side of the load switch); input voltage range is 20 V maximum. |
| 5 | ON/OFF | input | On/off control input to the gate of Q1, with a voltage range of 8 V maximum and 2 kV HBM ESD rating. |
| 6 | R1,C1 | passive | Q1 drain and Q2 gate node, where pull-up resistor R1 (typical 10kΩ to 1MΩ) and optional slew-rate capacitor C1 (typical 1000pF) connect. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-363 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `FDG6323L-TP`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `fdg6323l-tp-etched.step` / `fdg6323l-tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fdg6323l-tp.step` / `fdg6323l-tp.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603071473724633088) (5 pp, sha256 `745705309b17dc2a`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fdg6323l-tp-datasheet.pdf)