component
F280041CPMS
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "f280041cpms",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"f280041cpms",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"f280041cpms.kicad_sym",
"f280041cpms.kicad_mod",
"f280041cpms.glb",
"f280041cpms.step",
"f280041cpms.lbr",
"docs/hero.png",
"docs/f280041cpms-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"f280041cpms-hero.glb",
"f280041cpms-hero.overlay.json"
],
"component": {
"mpn": "F280041CPMS",
"manufacturer": "Texas Instruments",
"package": "LQFP-64(10x10)",
"pin_count": 64,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://www.ti.com/cn/lit/gpn/tms320f280045",
"parts": {
"symbol": "f280041cpms.kicad_sym",
"footprint": "f280041cpms.kicad_mod",
"model_3d": "f280041cpms-hero.glb",
"model_3d_plain": "f280041cpms.glb",
"model_3d_step": "f280041cpms-etched.step",
"model_3d_step_plain": "f280041cpms.step",
"lbr": "f280041cpms.lbr"
},
"distributor_links": {
"lcsc": "C1338352",
"digikey": "296-53064-ND",
"mouser": "595-F280041CPMS"
},
"distributor_check": {
"checked_at": "2026-10-08T21:45:27Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-53064-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-F280041CPMS",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "GPIO29",
"type": "bidirectional",
"description": "General-purpose I/O 29; alternates include SCIA_TX, EPWM7_B, OUTPUTXBAR6, EQEP1_B, SD1_C3, EQEP2_INDEX, LINA_RX, SPIB_STE and ERRORSTS (active-low error status output)."
},
{
"number": "2",
"name": "GPIO28",
"type": "bidirectional",
"description": "General-purpose I/O 28; alternates include SCIA_RX, EPWM7_A, OUTPUTXBAR5, EQEP1_A, SD1_D3, EQEP2_STROBE, LINA_TX, SPIB_CLK and ERRORSTS (active-low error status output)."
},
{
"number": "3",
"name": "XRSn",
"type": "bidirectional",
"description": "Device reset input and watchdog reset output; open-drain with internal pull-up, with a 2.2 kΩ to 10 kΩ resistor to VDDIO and at most 100 nF to VSS recommended."
},
{
"number": "4",
"name": "VDD",
"type": "power_in",
"description": "1.2 V digital logic supply; TI recommends a minimum total of about 20 µF decoupling near the VDD pins."
},
{
"number": "5",
"name": "VSS",
"type": "power_in",
"description": "Digital ground; must be connected to the board ground."
},
{
"number": "6",
"name": "A6/PGA5_OF",
"type": "input",
"description": "ADC-A input 6, also PGA-5 output filter (optional) and CMPSS-5 comparator input, with digital input option AIO228."
},
{
"number": "7",
"name": "B2/C6/PGA3_OF",
"type": "input",
"description": "ADC-B input 2 and ADC-C input 6, also PGA-3 output filter (optional) and CMPSS-3 comparator input."
},
{
"number": "8",
"name": "B3/VDAC",
"type": "input",
"description": "ADC-B input 3; VDAC is the optional external reference for on-chip DACs, with a fixed 100 pF capacitor to VSSA and at least 1 µF if used as DAC reference."
},
{
"number": "9",
"name": "A2/B6/PGA1_OF",
"type": "input",
"description": "ADC-A input 2 and ADC-B input 6, also PGA-1 output filter (optional)."
},
{
"number": "10",
"name": "PGA1_GND/PGA3_GND/PGA5_GND",
"type": "power_in",
"description": "Kelvin ground reference for the PGA-1, PGA-3 and PGA-5 inputs; ideally equal to VSSA, with a stated PGA GND range of -50 mV to 200 mV."
},
{
"number": "11",
"name": "C4/PGA5_IN",
"type": "input",
"description": "ADC-C input 4, also PGA-5 input."
},
{
"number": "12",
"name": "C0/PGA1_IN",
"type": "input",
"description": "ADC-C input 0, also PGA-1 input."
},
{
"number": "13",
"name": "C2/PGA3_IN",
"type": "input",
"description": "ADC-C input 2, also PGA-3 input."
},
{
"number": "14",
"name": "A1/DACB_OUT",
"type": "input",
"description": "ADC-A input 1, also buffered DAC-B output."
},
{
"number": "15",
"name": "A0/B15/C15/DACA_OUT",
"type": "input",
"description": "ADC-A input 0 (also ADC-B input 15 and ADC-C input 15), also buffered DAC-A output."
},
{
"number": "16",
"name": "VREFHIA/VREFHIB/VREFHIC",
"type": "bidirectional",
"description": "ADC high reference; driven externally in external-reference mode or by the device in internal-reference mode, with at least 2.2 µF placed between each VREFHIx and its VREFLOx pin and no external loading."
},
{
"number": "17",
"name": "VREFLOA/VREFLOB/VREFLOC",
"type": "input",
"description": "ADC-A, ADC-B and ADC-C low reference; must be tied to VSSA."
},
{
"number": "18",
"name": "C1/PGA2_IN",
"type": "input",
"description": "ADC-C input 1, also PGA-2 input."
},
{
"number": "19",
"name": "C3/PGA4_IN",
"type": "input",
"description": "ADC-C input 3, also PGA-4 input."
},
{
"number": "20",
"name": "PGA2_GND/PGA4_GND/PGA6_GND",
"type": "power_in",
"description": "Kelvin ground reference for the PGA-2, PGA-4 and PGA-6 inputs; ideally equal to VSSA."
},
{
"number": "21",
"name": "VSSA",
"type": "power_in",
"description": "Analog ground; connect to VSS if a separate analog ground is not used."
},
{
"number": "22",
"name": "VDDA",
"type": "power_in",
"description": "3.3 V analog supply; place at least a 2.2 µF decoupling capacitor to VSSA on each pin, and connect to VDDIO if no dedicated analog supply is used."
},
{
"number": "23",
"name": "A4/B8/PGA2_OF",
"type": "input",
"description": "ADC-A input 4 and ADC-B input 8, also PGA-2 output filter (optional)."
},
{
"number": "24",
"name": "B4/C8/PGA4_OF",
"type": "input",
"description": "ADC-B input 4 and ADC-C input 8, also PGA-4 output filter (optional)."
},
{
"number": "25",
"name": "A10/B1/C10/PGA7_OF",
"type": "input",
"description": "ADC-A input 10, ADC-B input 1 and ADC-C input 10, also PGA-7 output filter as shown in the 64-pin PM figure."
},
{
"number": "26",
"name": "VSS",
"type": "power_in",
"description": "Digital ground; must be connected to the board ground."
},
{
"number": "27",
"name": "VDD",
"type": "power_in",
"description": "1.2 V digital logic supply; TI recommends a minimum total of about 20 µF decoupling near the VDD pins."
},
{
"number": "28",
"name": "VDDIO",
"type": "power_in",
"description": "3.3 V digital I/O supply; place a minimum 0.1 µF decoupling capacitor on each pin."
},
{
"number": "29",
"name": "GPIO13",
"type": "bidirectional",
"description": "General-purpose I/O 13; alternates include EPWM7_B, CANB_RX, EQEP1_INDEX, SCIB_RX, PMBUSA_ALERT (open-drain) and FSIRXA_CLK."
},
{
"number": "30",
"name": "GPIO12",
"type": "bidirectional",
"description": "General-purpose I/O 12; alternates include EPWM7_A, CANB_TX, EQEP1_STROBE, SCIB_TX, PMBUSA_CTL and FSIRXA_D0."
},
{
"number": "31",
"name": "GPIO11",
"type": "bidirectional",
"description": "General-purpose I/O 11; alternates include EPWM6_B, SCIB_RX, OUTPUTXBAR7, EQEP1_B, SPIA_STE and FSIRXA_D1."
},
{
"number": "32",
"name": "GPIO33",
"type": "bidirectional",
"description": "General-purpose I/O 33; alternates include I2CA_SCL (open-drain), SPIB_STE, OUTPUTXBAR4, LINA_RX, SD1_C3, FSIRXA_CLK and CANA_RX."
},
{
"number": "33",
"name": "GPIO16",
"type": "bidirectional",
"description": "General-purpose I/O 16; alternates include SPIA_SIMO, CANB_TX, OUTPUTXBAR7, EPWM5_A, SCIA_TX, SD1_D1, EQEP1_STROBE, PMBUSA_SCL and XCLKOUT."
},
{
"number": "34",
"name": "GPIO17",
"type": "bidirectional",
"description": "General-purpose I/O 17; alternates include SPIA_SOMI, CANB_RX, OUTPUTXBAR8, EPWM5_B, SCIA_RX, SD1_C1, EQEP1_INDEX and PMBUSA_SDA."
},
{
"number": "35",
"name": "GPIO24",
"type": "bidirectional",
"description": "General-purpose I/O 24; alternates include OUTPUTXBAR1, EQEP2_A, EPWM8_A, SPIB_SIMO, SD1_D1, PMBUSA_SCL, SCIA_TX and ERRORSTS."
},
{
"number": "36",
"name": "TCK",
"type": "input",
"description": "JTAG test clock with internal pull-up."
},
{
"number": "37",
"name": "GPIO37/TDO",
"type": "output",
"description": "JTAG test data output (default function); tri-stated when JTAG is inactive, so an internal or external pull-up is required to avoid a floating GPIO input."
},
{
"number": "38",
"name": "TMS",
"type": "bidirectional",
"description": "JTAG test mode select with internal pull-up; an external 2.2 kΩ pull-up to VDDIO is recommended to hold JTAG in reset during normal operation."
},
{
"number": "39",
"name": "GPIO35/TDI",
"type": "input",
"description": "JTAG test data input (default function); internal pull-up is disabled by default, so enable it or add an external pull-up if used as TDI."
},
{
"number": "40",
"name": "GPIO32",
"type": "bidirectional",
"description": "General-purpose I/O 32; alternates include I2CA_SDA (open-drain), SPIB_CLK, EPWM8_B, LINA_TX, SD1_D3, FSIRXA_D0 and CANA_TX."
},
{
"number": "41",
"name": "GPIO18_X2",
"type": "bidirectional",
"description": "General-purpose I/O 18 or crystal oscillator output X2; GPIO18 is usable only when the system is clocked from INTOSC and X1 has an external pull-down (1 kΩ recommended)."
},
{
"number": "42",
"name": "X1",
"type": "bidirectional",
"description": "Crystal oscillator input or single-ended 3.3 V clock input; device initialization software must configure this pin before enabling the crystal oscillator."
},
{
"number": "43",
"name": "VDDIO",
"type": "power_in",
"description": "3.3 V digital I/O supply; place a minimum 0.1 µF decoupling capacitor on each pin."
},
{
"number": "44",
"name": "VDD",
"type": "power_in",
"description": "1.2 V digital logic supply; TI recommends a minimum total of about 20 µF decoupling near the VDD pins."
},
{
"number": "45",
"name": "VSS",
"type": "power_in",
"description": "Digital ground; must be connected to the board ground."
},
{
"number": "46",
"name": "VREGENZ",
"type": "input",
"description": "Internal regulator enable with internal pull-down; tie to VSS to enable the internal VREG, or to VDDIO to use an external VDD supply."
},
{
"number": "47",
"name": "GPIO8",
"type": "bidirectional",
"description": "General-purpose I/O 8; alternates include EPWM5_A, CANB_TX, ADCSOCAO, EQEP1_STROBE, SCIA_TX, SPIA_SIMO, I2CA_SCL (open-drain) and FSITXA_D1."
},
{
"number": "48",
"name": "GPIO4",
"type": "bidirectional",
"description": "General-purpose I/O 4; alternates include EPWM3_A, OUTPUTXBAR3, CANA_TX and FSIRXA_CLK."
},
{
"number": "49",
"name": "GPIO3",
"type": "bidirectional",
"description": "General-purpose I/O 3; alternates include EPWM2_B, OUTPUTXBAR2, PMBUSA_SCL (open-drain), SPIA_CLK, SCIA_RX and FSIRXA_D0."
},
{
"number": "50",
"name": "GPIO2",
"type": "bidirectional",
"description": "General-purpose I/O 2; alternates include EPWM2_A, OUTPUTXBAR1, PMBUSA_SDA (open-drain), SCIA_TX and FSIRXA_D1."
},
{
"number": "51",
"name": "GPIO1",
"type": "bidirectional",
"description": "General-purpose I/O 1; alternates include EPWM1_B and I2CA_SCL (open-drain)."
},
{
"number": "52",
"name": "GPIO0",
"type": "bidirectional",
"description": "General-purpose I/O 0; alternates include EPWM1_A and I2CA_SDA (open-drain)."
},
{
"number": "53",
"name": "VDDIO_SW",
"type": "power_in",
"description": "3.3 V supply pin for the internal DC/DC regulator; must be connected to VDDIO, with a 20 µF bulk input capacitor when the DC/DC is used."
},
{
"number": "54",
"name": "GPIO23_VSW",
"type": "bidirectional",
"description": "General-purpose I/O 23 (default DC/DC mode) or the internal DC/DC switch output VSW when DCDCEN = 1; the pin has about 100 pF internal capacitance."
},
{
"number": "55",
"name": "VSS_SW",
"type": "power_in",
"description": "Internal DC/DC regulator ground; must be connected to VSS."
},
{
"number": "56",
"name": "GPIO22_VFBSW",
"type": "bidirectional",
"description": "General-purpose I/O 22 (default DC/DC mode) or the internal DC/DC feedback VFBSW; when the DC/DC is used, connect to the node where L(VSW) connects to the VDD rail, as close to the device as possible."
},
{
"number": "57",
"name": "GPIO7",
"type": "bidirectional",
"description": "General-purpose I/O 7; alternates include EPWM4_B, OUTPUTXBAR5, EQEP1_B, CANB_RX, SPIB_SIMO and FSITXA_CLK."
},
{
"number": "58",
"name": "VSS",
"type": "power_in",
"description": "Digital ground; must be connected to the board ground."
},
{
"number": "59",
"name": "VDD",
"type": "power_in",
"description": "1.2 V digital logic supply; TI recommends a minimum total of about 20 µF decoupling near the VDD pins."
},
{
"number": "60",
"name": "VDDIO",
"type": "power_in",
"description": "3.3 V digital I/O supply; place a minimum 0.1 µF decoupling capacitor on each pin."
},
{
"number": "61",
"name": "GPIO5",
"type": "bidirectional",
"description": "General-purpose I/O 5; alternates include EPWM3_B, OUTPUTXBAR3, CANA_RX, SPIA_STE and FSITXA_D1."
},
{
"number": "62",
"name": "GPIO9",
"type": "bidirectional",
"description": "General-purpose I/O 9; alternates include EPWM5_B, SCIB_TX, OUTPUTXBAR6, EQEP1_INDEX, SCIA_RX, SPIA_CLK and FSITXA_D0."
},
{
"number": "63",
"name": "GPIO10",
"type": "bidirectional",
"description": "General-purpose I/O 10; alternates include EPWM6_A, CANB_RX, ADCSOCBO, EQEP1_A, SCIB_TX, SPIA_SOMI, I2CA_SDA (open-drain) and FSITXA_CLK."
},
{
"number": "64",
"name": "GPIO6",
"type": "bidirectional",
"description": "General-purpose I/O 6; alternates include EPWM4_A, OUTPUTXBAR4, SYNCOUT, EQEP1_A, CANB_TX, SPIB_SOMI and FSITXA_D0."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: MPN F280041CPMS is not spelled out in the datasheet. The 64-pin PM figure (Figure 5-2) is listed for; The 10x10 mm body size from the package hint is not stated in the provided text (section 11 was not ; Pin 25 is labeled A10/B1/C10/PGA7_OF in Figure 5-2 and Table 5-1 for the 64-pin PM package. However,"
],
"pages_sent": 146,
"cost_usd": 1.0668,
"at": "2026-10-08T21:45:02"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/tms320f280045",
"pages": 277,
"sha256": "867e7bb5ada6819c",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 64,
"described": 64,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "f280041cpms.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.5
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "f280041cpms-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.5
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "7518ce1a3a361b1542844e220f85510e89f5aebe7368b7c00068cdf1d65b0a7e",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}