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ESDS552DBZR

Texas Instruments · ESD And Surge Protection (TVS/ESD) · SOT-23

ESDS552DBZR from Texas Instruments, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IO 1 bidirectional Surge- and ESD-protected I/O pin for the bidirectional TVS, with input voltage between any two pins limited to -12 V to 12 V.
2 IO 2 bidirectional Surge- and ESD-protected I/O pin for the bidirectional TVS, with input voltage between any two pins limited to -12 V to 12 V.
3 GND power_in Ground pin; connect to ground.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23
Category Circuit Protection
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Reverse stand-off voltage VRWM -12 12 V IIO < 50nA 4
Breakdown voltage, IO to GND and GND to IO VBR 13.2 18 V IIO = ±1mA 4
Leakage current at VRWM ILEAKAGE 10 50 nA VIO = ±12V 4
Line capacitance, IO to GND CLine 9.5 11 pF VIO = 0V, f = 1MHz 4
Input voltage between any 2 pins VIN -12 12 V between any 2 pins 3
Operating free-air temperature (recommended) TA -40 125 °C 3
Operating free-air temperature (absolute maximum) TA -40 125 °C 3
Storage temperature Tstg -65 155 °C 3
Peak Pulse Power PPP 500 W IEC 61000-4-5 Surge (tp 8/20 µs) at 25 °C 3
Peak Pulse Current IPP 25 A IEC 61000-4-5 Surge (tp 8/20 µs) at 25 °C 3
Human body model ESD V(ESD) -2500 2500 V HBM, per ANSI/ESDA/JEDEC JS-001, all pins 3
Charged device model ESD V(ESD) -1000 1000 V CDM, per JEDEC JS-002, all pins 3
IEC 61000-4-2 contact discharge ESD V(ESD) -30000 30000 V IEC 61000-4-2 Contact Discharge, all pins 3
IEC 61000-4-2 air discharge ESD V(ESD) -30000 30000 V IEC 61000-4-2 Air Discharge, all pins 3
Surge clamping voltage, I/O to GND VCLAMP 19 V tp = 8/20µs, IPP = 1A, I/O to GND 4
Surge clamping voltage, GND to I/O VCLAMP 19 V tp = 8/20µs, IPP = 1A, GND to I/O 4
Surge clamping voltage, I/O to GND VCLAMP 23.5 V tp = 8/20µs, IPP = 20A, I/O to GND 4
Surge clamping voltage, GND to I/O VCLAMP 23.5 V tp = 8/20µs, IPP = 20A, GND to I/O 4
8/20µs surge dynamic resistance, I/O to GND RDYN 0.4 Ω 8/20µs surge, I/O to GND 4
8/20µs surge dynamic resistance, GND to I/O RDYN 0.38 Ω 8/20µs surge, GND to I/O 4
Junction-to-ambient thermal resistance RθJA 244.1 °C/W 3
Junction-to-case (top) thermal resistance RθJC(top) 107.4 °C/W 3
Junction-to-board thermal resistance RθJB 85.5 °C/W 3
Junction-to-top characterization parameter ΨJT 12.8 °C/W 3
Junction-to-board characterization parameter ΨJB 84.8 °C/W 3

CAD (KiCad official)

  • Symbol: ESDS552DBZR
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: esds552dbzr-etched.step / esds552dbzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); esds552dbzr.step / esds552dbzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (14 pp, sha256 0f2ab62094ba9423, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF