component
ESDA6V1U1RL
Public Made by Adomby adom
STMicroelectronics ESD And Surge Protection (TVS/ESD), SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "esda6v1u1rl",
"version": "0.1.0",
"type": "component",
"description": "STMicroelectronics ESD And Surge Protection (TVS/ESD), SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"circuit protection",
"esda6v1u1rl",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"esda6v1u1rl.kicad_sym",
"esda6v1u1rl.kicad_mod",
"esda6v1u1rl.glb",
"esda6v1u1rl.step",
"esda6v1u1rl.lbr",
"docs/hero.png",
"docs/esda6v1u1rl-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"esda6v1u1rl-hero.glb",
"esda6v1u1rl-hero.overlay.json"
],
"component": {
"mpn": "ESDA6V1U1RL",
"manufacturer": "STMicroelectronics",
"package": "SO-8",
"pin_count": 8,
"category": "Circuit Protection",
"subcategory": "ESD And Surge Protection (TVS/ESD)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879914212319232",
"parts": {
"symbol": "esda6v1u1rl.kicad_sym",
"footprint": "esda6v1u1rl.kicad_mod",
"model_3d": "esda6v1u1rl-hero.glb",
"model_3d_plain": "esda6v1u1rl.glb",
"model_3d_step": "esda6v1u1rl-etched.step",
"model_3d_step_plain": "esda6v1u1rl.step",
"lbr": "esda6v1u1rl.lbr"
},
"distributor_links": {
"lcsc": 118278,
"digikey": "497-3711-2-ND",
"mouser": "511-ESDA6V1U1-TR"
},
"distributor_check": {
"checked_at": "2026-10-03T01:13:23Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "497-3711-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "511-ESDA6V1U1-TR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "I/O 1",
"type": "passive",
"description": "Unidirectional TRANSIL protection channel 1 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground."
},
{
"number": "2",
"name": "I/O 2",
"type": "passive",
"description": "Unidirectional TRANSIL protection channel 2 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground."
},
{
"number": "3",
"name": "I/O 3",
"type": "passive",
"description": "Unidirectional TRANSIL protection channel 3 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground."
},
{
"number": "4",
"name": "I/O 4",
"type": "passive",
"description": "Unidirectional TRANSIL protection channel 4 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground."
},
{
"number": "5",
"name": "I/O 5",
"type": "passive",
"description": "Unidirectional TRANSIL protection channel 5 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground."
},
{
"number": "6",
"name": "GND",
"type": "power_in",
"description": "Common ground connection of the TRANSIL array, joined internally to pin 7, which is the reference for all six protection channels."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Common ground connection of the TRANSIL array, joined internally to pin 6, which is the reference for all six protection channels."
},
{
"number": "8",
"name": "I/O 6",
"type": "passive",
"description": "Unidirectional TRANSIL protection channel 6 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text+vision",
"consensus_model": "claude-opus-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The functional diagram shows pins 6 and 7 both labelled GND and tied to the common node. Pins 2 and ; Pin types are set to passive for the I/O pins because ESD protection channels have no ERC class that",
"vision extraction: provenance cannot be text-verified; needs consensus"
],
"pages_sent": 6,
"cost_usd": 0.1845,
"at": "2026-10-03T01:12:58"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879914212319232",
"pages": 6,
"sha256": "5c794295d1f7fe3f",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
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}
}