component
ESDA6V1U1RL
Public Made by Adomby adom
STMicroelectronics ESD And Surge Protection (TVS/ESD), SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownESDA6V1U1RL
STMicroelectronics · ESD And Surge Protection (TVS/ESD) · SO-8
ESDA6V1U1RL from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O 1 | passive | Unidirectional TRANSIL protection channel 1 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground. |
| 2 | I/O 2 | passive | Unidirectional TRANSIL protection channel 2 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground. |
| 3 | I/O 3 | passive | Unidirectional TRANSIL protection channel 3 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground. |
| 4 | I/O 4 | passive | Unidirectional TRANSIL protection channel 4 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground. |
| 5 | I/O 5 | passive | Unidirectional TRANSIL protection channel 5 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground. |
| 6 | GND | power_in | Common ground connection of the TRANSIL array, joined internally to pin 7, which is the reference for all six protection channels. |
| 7 | GND | power_in | Common ground connection of the TRANSIL array, joined internally to pin 6, which is the reference for all six protection channels. |
| 8 | I/O 6 | passive | Unidirectional TRANSIL protection channel 6 for a data line, clamping positive transients just above logic supply level (VBR 6.1 V min to 7.2 V max at 1 mA) and negative transients to a diode drop below ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Circuit Protection |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
ESDA6V1U1RL - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
esda6v1u1rl-etched.step/esda6v1u1rl-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);esda6v1u1rl.step/esda6v1u1rl.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (6 pp, sha256
5c794295d1f7fe3f, retrieved 2026-10-03, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).