component
EG2124A
Public Made by Adomby adom
EG Micro Gate Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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EG2124A
EG Micro · Gate Drivers · TSSOP-20
EG2124A from EG Micro, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN1 | input | High-side logic input for channel 1, active high (1 turns the high-side MOSFET on, 0 turns it off), with a logic-high threshold of 2.5 V minimum and a logic-low threshold of 1.0 V maximum. |
| 2 | HIN2 | input | High-side logic input for channel 2, active high (1 turns the high-side MOSFET on, 0 turns it off), with a logic-high threshold of 2.5 V minimum and a logic-low threshold of 1.0 V maximum. |
| 3 | HIN3 | input | High-side logic input for channel 3, active high (1 turns the high-side MOSFET on, 0 turns it off), with a logic-high threshold of 2.5 V minimum and a logic-low threshold of 1.0 V maximum. |
| 4 | LIN1 | input | Low-side logic input for channel 1, active high (1 turns the low-side MOSFET on, 0 turns it off), with internal pull-down so that a floating input keeps the low-side MOSFET off. |
| 5 | LIN2 | input | Low-side logic input for channel 2, active high (1 turns the low-side MOSFET on, 0 turns it off), with internal pull-down so that a floating input keeps the low-side MOSFET off. |
| 6 | LIN3 | input | Low-side logic input for channel 3, active high (1 turns the low-side MOSFET on, 0 turns it off), with internal pull-down so that a floating input keeps the low-side MOSFET off. |
| 7 | VCC | power_in | Analog supply for the low-side circuitry, specified for 5 V to 20 V operation with an absolute maximum of 25 V. |
| 8 | GND | power_in | Analog ground reference for the device. |
| 9 | LO1 | output | Low-side gate drive output for channel 1 that controls the low-side MOSFET, with a peak source current of +0.8 A and sink current of -1.2 A (pulse width up to 10 µs). |
| 10 | LO2 | output | Low-side gate drive output for channel 2 that controls the low-side MOSFET, with a peak source current of +0.8 A and sink current of -1.2 A (pulse width up to 10 µs). |
| 11 | LO3 | output | Low-side gate drive output for channel 3 that controls the low-side MOSFET, with a peak source current of +0.8 A and sink current of -1.2 A (pulse width up to 10 µs). |
| 12 | VS1 | passive | High-side floating ground (half-bridge output node) for channel 1, which must stay between VB-25 V and VB+0.3 V and has a static negative limit of -6 V. |
| 13 | HO1 | output | High-side gate drive output for channel 1 that controls the high-side MOSFET, referenced to VS1 and limited to VS-0.3 V to VB+0.3 V. |
| 14 | VB1 | power_in | High-side floating bootstrap supply for channel 1, with an absolute maximum of 280 V and undervoltage lockout turn-on at 4.1 V and turn-off at 4.0 V. |
| 15 | VS2 | passive | High-side floating ground (half-bridge output node) for channel 2, which must stay between VB-25 V and VB+0.3 V and has a static negative limit of -6 V. |
| 16 | HO2 | output | High-side gate drive output for channel 2 that controls the high-side MOSFET, referenced to VS2 and limited to VS-0.3 V to VB+0.3 V. |
| 17 | VB2 | power_in | High-side floating bootstrap supply for channel 2, with an absolute maximum of 280 V and undervoltage lockout turn-on at 4.1 V and turn-off at 4.0 V. |
| 18 | VS3 | passive | High-side floating ground (half-bridge output node) for channel 3, which must stay between VB-25 V and VB+0.3 V and has a static negative limit of -6 V. |
| 19 | HO3 | output | High-side gate drive output for channel 3 that controls the high-side MOSFET, referenced to VS3 and limited to VS-0.3 V to VB+0.3 V. |
| 20 | VB3 | power_in | High-side floating bootstrap supply for channel 3, with an absolute maximum of 280 V and undervoltage lockout turn-on at 4.1 V and turn-off at 4.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | EG Micro |
| Package | TSSOP-20 |
| Category | Motor Driver ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 自举高端 VB 电源 (High-side bootstrap supply) | VB1、VB2、VB3 | -0.3 | 280 | V | - | 8 | |
| 电源 VCC (Supply) | VCC | -0.3 | 25 | V | - | 8 | |
| 环境温度 (Ambient temperature) | -40 | 125 | ℃ | - | 9 | ||
| 储存温度 (Storage temperature) | -55 | 150 | ℃ | - | 9 | ||
| 焊接温度 (Soldering temperature) | 300 | ℃ | T=10S | 9 | |||
| 电源 VDD (Supply voltage) | VDD | 5 | 12 | 20 | V | 9 | |
| 输入逻辑信号高电位 (Logic input high voltage) | Vin(H) | 2.5 | V | 所有输入控制信号 | 9 | ||
| 输入逻辑信号低电位 (Logic input low voltage) | Vin(L) | -0.3 | 0 | 1 | V | 所有输入控制信号 | 9 |
| 输入逻辑信号高电平的电流 (Logic input high current) | IN(H) | 20 | uA | Vin=5V | 9 | ||
| 输入逻辑信号低电平的电流 (Logic input low current) | IN(L) | -15 | uA | Vin=0V | 9 | ||
| 悬浮电源漏电流 (Floating supply leakage current) | ILK | 0.1 | 1 | uA | VB1,2,3=VS1,2,3=300V | 9 | |
| VBS 静态电流 (VBS quiescent current) | IQBS | 20 | 50 | uA | VIN 悬空 | 9 | |
| VBS 动态电流 (VBS dynamic current) | IPBS | 100 | 200 | uA | f=16KHZ | 9 | |
| Vcc 静态电流 (Vcc quiescent current) | IQcc | 150 | 350 | uA | VIN 悬空 | 9 | |
| Vcc 动态电流 (Vcc dynamic current) | IPcc | 400 | 600 | uA | f=16KHZ | 9 | |
| LIN 高电平输入偏置电流 (LIN high-level input bias current) | ILINH | 20 | 40 | uA | VLIN=5V | 9 | |
| LIN 低电平输入偏置电流 (LIN low-level input bias current) | ILINL | 2 | uA | VLIN=0V | 9 | ||
| HIN 高电平输入偏置电流 (HIN high-level input bias current) | IHINH | 20 | 40 | uA | VLIN=5V | 9 | |
| HIN 低电平输入偏置电流 (HIN low-level input bias current) | IHINL | 2 | uA | VLIN=0V | 9 | ||
| 低端输出 LO 开延时 (LO turn-on delay) | Ton | 320 | 420 | nS | 见图 7-1 | 9 | |
| 低端输出 LO 关延时 (LO turn-off delay) | Toff | 120 | 220 | nS | 见图 7-1 | 9 | |
| 低端输出 LO 上升时间 (LO rise time) | Tr | 35 | 70 | nS | 见图 7-1 | 9 | |
| 低端输出 LO 下降时间 (LO fall time) | Tf | 25 | 50 | nS | 见图 7-1 | 9 | |
| 高端输出 HO 开延时 (HO turn-on delay) | Ton | 320 | 420 | nS | 见图 7-2 | 9 | |
| 高端输出 HO 关延时 (HO turn-off delay) | Toff | 120 | 220 | nS | 见图 7-2 | 9 | |
| 高端输出 HO 上升时间 (HO rise time) | Tr | 35 | 70 | nS | 见图 7-2 | 9 | |
| 高端输出 HO 下降时间 (HO fall time) | Tf | 25 | 50 | nS | 见图 7-2 | 9 | |
| 死区时间 (Dead time) | DT | 100 | 200 | 300 | nS | 见图 7-3，无负载电容 CL=0 | 10 |
| VS 静态负压 (VS static negative voltage) | VSN | -6 | V | 9 | |||
| 输入下拉电阻 (Input pull-down resistor) | RIN | 240 | KΩ | 10 | |||
| HO 下拉电阻 (HO pull-down resistor) | RHO | 70 | KΩ | 10 | |||
| LO 下拉电阻 (LO pull-down resistor) | RLO | 70 | KΩ | 10 | |||
| Vcc 开启电压 (Vcc turn-on voltage) | Vcc(on) | 4.3 | V | 9 | |||
| Vcc 关断电压 (Vcc turn-off voltage) | Vcc(off) | 4.2 | V | 10 | |||
| VB 开启电压 (VB turn-on voltage) | VB(on) | 4.1 | V | 10 | |||
| VB 关断电压 (VB turn-off voltage) | VB(off) | 4 | V | 10 | |||
| IO 输出拉电流 (IO source current) | IO+ | 0.8 | A | Vo=0V,VIN=VIH PW≤10uS | 10 | ||
| IO 输出灌电流 (IO sink current) | IO- | -1.2 | A | Vo=12V,VIN=VIL PW≤10uS | 10 |
CAD (KiCad official)
- Symbol:
EG2124A - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
eg2124a-etched.step/eg2124a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eg2124a.step/eg2124a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: EG Micro datasheet (15 pp, sha256
aebf228e12198305, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# EG2124A
**EG Micro** · Gate Drivers · TSSOP-20
EG2124A from EG Micro, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN1 | input | High-side logic input for channel 1, active high (1 turns the high-side MOSFET on, 0 turns it off), with a logic-high threshold of 2.5 V minimum and a logic-low threshold of 1.0 V maximum. |
| 2 | HIN2 | input | High-side logic input for channel 2, active high (1 turns the high-side MOSFET on, 0 turns it off), with a logic-high threshold of 2.5 V minimum and a logic-low threshold of 1.0 V maximum. |
| 3 | HIN3 | input | High-side logic input for channel 3, active high (1 turns the high-side MOSFET on, 0 turns it off), with a logic-high threshold of 2.5 V minimum and a logic-low threshold of 1.0 V maximum. |
| 4 | LIN1 | input | Low-side logic input for channel 1, active high (1 turns the low-side MOSFET on, 0 turns it off), with internal pull-down so that a floating input keeps the low-side MOSFET off. |
| 5 | LIN2 | input | Low-side logic input for channel 2, active high (1 turns the low-side MOSFET on, 0 turns it off), with internal pull-down so that a floating input keeps the low-side MOSFET off. |
| 6 | LIN3 | input | Low-side logic input for channel 3, active high (1 turns the low-side MOSFET on, 0 turns it off), with internal pull-down so that a floating input keeps the low-side MOSFET off. |
| 7 | VCC | power_in | Analog supply for the low-side circuitry, specified for 5 V to 20 V operation with an absolute maximum of 25 V. |
| 8 | GND | power_in | Analog ground reference for the device. |
| 9 | LO1 | output | Low-side gate drive output for channel 1 that controls the low-side MOSFET, with a peak source current of +0.8 A and sink current of -1.2 A (pulse width up to 10 µs). |
| 10 | LO2 | output | Low-side gate drive output for channel 2 that controls the low-side MOSFET, with a peak source current of +0.8 A and sink current of -1.2 A (pulse width up to 10 µs). |
| 11 | LO3 | output | Low-side gate drive output for channel 3 that controls the low-side MOSFET, with a peak source current of +0.8 A and sink current of -1.2 A (pulse width up to 10 µs). |
| 12 | VS1 | passive | High-side floating ground (half-bridge output node) for channel 1, which must stay between VB-25 V and VB+0.3 V and has a static negative limit of -6 V. |
| 13 | HO1 | output | High-side gate drive output for channel 1 that controls the high-side MOSFET, referenced to VS1 and limited to VS-0.3 V to VB+0.3 V. |
| 14 | VB1 | power_in | High-side floating bootstrap supply for channel 1, with an absolute maximum of 280 V and undervoltage lockout turn-on at 4.1 V and turn-off at 4.0 V. |
| 15 | VS2 | passive | High-side floating ground (half-bridge output node) for channel 2, which must stay between VB-25 V and VB+0.3 V and has a static negative limit of -6 V. |
| 16 | HO2 | output | High-side gate drive output for channel 2 that controls the high-side MOSFET, referenced to VS2 and limited to VS-0.3 V to VB+0.3 V. |
| 17 | VB2 | power_in | High-side floating bootstrap supply for channel 2, with an absolute maximum of 280 V and undervoltage lockout turn-on at 4.1 V and turn-off at 4.0 V. |
| 18 | VS3 | passive | High-side floating ground (half-bridge output node) for channel 3, which must stay between VB-25 V and VB+0.3 V and has a static negative limit of -6 V. |
| 19 | HO3 | output | High-side gate drive output for channel 3 that controls the high-side MOSFET, referenced to VS3 and limited to VS-0.3 V to VB+0.3 V. |
| 20 | VB3 | power_in | High-side floating bootstrap supply for channel 3, with an absolute maximum of 280 V and undervoltage lockout turn-on at 4.1 V and turn-off at 4.0 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | EG Micro |
| Package | TSSOP-20 |
| Category | Motor Driver ICs |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 自举高端 VB 电源 (High-side bootstrap supply) | VB1、VB2、VB3 | -0.3 | | 280 | V | - | 8 |
| 电源 VCC (Supply) | VCC | -0.3 | | 25 | V | - | 8 |
| 环境温度 (Ambient temperature) | | -40 | | 125 | ℃ | - | 9 |
| 储存温度 (Storage temperature) | | -55 | | 150 | ℃ | - | 9 |
| 焊接温度 (Soldering temperature) | | | | 300 | ℃ | T=10S | 9 |
| 电源 VDD (Supply voltage) | VDD | 5 | 12 | 20 | V | | 9 |
| 输入逻辑信号高电位 (Logic input high voltage) | Vin(H) | 2.5 | | | V | 所有输入控制信号 | 9 |
| 输入逻辑信号低电位 (Logic input low voltage) | Vin(L) | -0.3 | 0 | 1 | V | 所有输入控制信号 | 9 |
| 输入逻辑信号高电平的电流 (Logic input high current) | IN(H) | | | 20 | uA | Vin=5V | 9 |
| 输入逻辑信号低电平的电流 (Logic input low current) | IN(L) | -15 | | | uA | Vin=0V | 9 |
| 悬浮电源漏电流 (Floating supply leakage current) | ILK | | 0.1 | 1 | uA | VB1,2,3=VS1,2,3=300V | 9 |
| VBS 静态电流 (VBS quiescent current) | IQBS | | 20 | 50 | uA | VIN 悬空 | 9 |
| VBS 动态电流 (VBS dynamic current) | IPBS | | 100 | 200 | uA | f=16KHZ | 9 |
| Vcc 静态电流 (Vcc quiescent current) | IQcc | | 150 | 350 | uA | VIN 悬空 | 9 |
| Vcc 动态电流 (Vcc dynamic current) | IPcc | | 400 | 600 | uA | f=16KHZ | 9 |
| LIN 高电平输入偏置电流 (LIN high-level input bias current) | ILINH | | 20 | 40 | uA | VLIN=5V | 9 |
| LIN 低电平输入偏置电流 (LIN low-level input bias current) | ILINL | | | 2 | uA | VLIN=0V | 9 |
| HIN 高电平输入偏置电流 (HIN high-level input bias current) | IHINH | | 20 | 40 | uA | VLIN=5V | 9 |
| HIN 低电平输入偏置电流 (HIN low-level input bias current) | IHINL | | | 2 | uA | VLIN=0V | 9 |
| 低端输出 LO 开延时 (LO turn-on delay) | Ton | | 320 | 420 | nS | 见图 7-1 | 9 |
| 低端输出 LO 关延时 (LO turn-off delay) | Toff | | 120 | 220 | nS | 见图 7-1 | 9 |
| 低端输出 LO 上升时间 (LO rise time) | Tr | | 35 | 70 | nS | 见图 7-1 | 9 |
| 低端输出 LO 下降时间 (LO fall time) | Tf | | 25 | 50 | nS | 见图 7-1 | 9 |
| 高端输出 HO 开延时 (HO turn-on delay) | Ton | | 320 | 420 | nS | 见图 7-2 | 9 |
| 高端输出 HO 关延时 (HO turn-off delay) | Toff | | 120 | 220 | nS | 见图 7-2 | 9 |
| 高端输出 HO 上升时间 (HO rise time) | Tr | | 35 | 70 | nS | 见图 7-2 | 9 |
| 高端输出 HO 下降时间 (HO fall time) | Tf | | 25 | 50 | nS | 见图 7-2 | 9 |
| 死区时间 (Dead time) | DT | 100 | 200 | 300 | nS | 见图 7-3，无负载电容 CL=0 | 10 |
| VS 静态负压 (VS static negative voltage) | VSN | | -6 | | V | | 9 |
| 输入下拉电阻 (Input pull-down resistor) | RIN | | 240 | | KΩ | | 10 |
| HO 下拉电阻 (HO pull-down resistor) | RHO | | 70 | | KΩ | | 10 |
| LO 下拉电阻 (LO pull-down resistor) | RLO | | 70 | | KΩ | | 10 |
| Vcc 开启电压 (Vcc turn-on voltage) | Vcc(on) | | 4.3 | | V | | 9 |
| Vcc 关断电压 (Vcc turn-off voltage) | Vcc(off) | | 4.2 | | V | | 10 |
| VB 开启电压 (VB turn-on voltage) | VB(on) | | 4.1 | | V | | 10 |
| VB 关断电压 (VB turn-off voltage) | VB(off) | | 4 | | V | | 10 |
| IO 输出拉电流 (IO source current) | IO+ | | 0.8 | | A | Vo=0V,VIN=VIH PW≤10uS | 10 |
| IO 输出灌电流 (IO sink current) | IO- | | -1.2 | | A | Vo=12V,VIN=VIL PW≤10uS | 10 |
## CAD (KiCad official)
- Symbol: `EG2124A`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `eg2124a-etched.step` / `eg2124a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `eg2124a.step` / `eg2124a.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [EG Micro datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918932418285568) (15 pp, sha256 `aebf228e12198305`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/eg2124a-datasheet.pdf)