# EFM8LB11F16ES0-C-QFN24R

**SILICON LABS** · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-24-EP(3x3)

EFM8LB11F16ES0-C-QFN24R from SILICON LABS, in a QFN-24-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P0.1 | bidirectional | Multifunction I/O with crossbar capability, also INT0.1/INT1.1, port match P0MAT.1, ADC0.0, CMP0P.0/CMP0N.0 and AGND analog functions. |
| 2 | P0.0 | bidirectional | Multifunction I/O with crossbar capability, also INT0.0/INT1.0, port match P0MAT.0 and VREF analog function. |
| 3 | GND | power_in | Ground. |
| 4 | VDD / VIO | power_in | Combined core supply and I/O supply power input. |
| 5 | RSTb / C2CK | bidirectional | Active-low reset input and C2 debug clock. |
| 6 | P3.0 / C2D | bidirectional | Multifunction I/O (no crossbar) shared with C2 debug data. |
| 7 | P2.3 | bidirectional | Multifunction I/O with crossbar capability, port match P2MAT.3, and DAC3 analog output. |
| 8 | P2.2 | bidirectional | Multifunction I/O with crossbar capability, port match P2MAT.2, and DAC2 analog output. |
| 9 | P2.1 | bidirectional | Multifunction I/O with crossbar capability, port match P2MAT.1, and DAC1 analog output. |
| 10 | P2.0 | bidirectional | Multifunction I/O with crossbar capability, port match P2MAT.0, and DAC0 analog output. |
| 11 | P1.6 | bidirectional | Multifunction I/O with crossbar capability, CLU3OUT, ADC0.11, and CMP1P.5/CMP1N.5 analog functions. |
| 12 | P1.5 | bidirectional | Multifunction I/O with crossbar capability, CLU2OUT, ADC0.10, and CMP1P.4/CMP1N.4 analog functions. |
| 13 | P1.4 | bidirectional | Multifunction I/O with crossbar capability, I2C0_SCL, ADC0.9, and CMP1P.3/CMP1N.3 analog functions. |
| 14 | P1.3 | bidirectional | Multifunction I/O with crossbar capability, I2C0_SDA, and CMP1P.2/CMP1N.2 analog functions. |
| 15 | GND | power_in | Ground. |
| 16 | P1.2 | bidirectional | Multifunction I/O with crossbar capability, port match P1MAT.2, and ADC0.8 analog input. |
| 17 | P1.1 | bidirectional | Multifunction I/O with crossbar capability, port match P1MAT.1, and ADC0.7 analog input. |
| 18 | P1.0 | bidirectional | Multifunction I/O with crossbar capability, port match P1MAT.0, and ADC0.6 analog input. |
| 19 | P0.7 | bidirectional | Multifunction I/O with crossbar capability, INT0.7/INT1.7, CLU1OUT, ADC0.5, CMP0P.5/CMP0N.5 and CMP1P.1/CMP1N.1 analog functions. |
| 20 | P0.6 | bidirectional | Multifunction I/O with crossbar capability, CNVSTR, INT0.6/INT1.6, ADC0.4, CMP0P.4/CMP0N.4 and CMP1P.0/CMP1N.0 analog functions. |
| 21 | P0.5 | bidirectional | Multifunction I/O with crossbar capability, UART0_RX, INT0.5/INT1.5, ADC0.3, and CMP0P.3/CMP0N.3 analog functions. |
| 22 | P0.4 | bidirectional | Multifunction I/O with crossbar capability, UART0_TX, INT0.4/INT1.4, ADC0.2, and CMP0P.2/CMP0N.2 analog functions. |
| 23 | P0.3 | bidirectional | Multifunction I/O with crossbar capability, EXTCLK, INT0.3/INT1.3, and EXTOSC analog function. |
| 24 | P0.2 | bidirectional | Multifunction I/O with crossbar capability, CLU0OUT, INT0.2/INT1.2, ADC0.1, and CMP0P.1/CMP0N.1 analog functions. |
| 25 | GND | power_in | Center exposed pad, ground. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | SILICON LABS |
| Package | QFN-24-EP(3x3) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 25 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Supply Voltage on VDD | VDD | 2.2 |  | 3.6 | V |  | 18 |
| Operating Supply Voltage on VIO | VIO | 2.2 |  |  | V | max is VDD | 18 |
| System Clock Frequency | fSYSCLK | 0 |  | 73.5 | MHz |  | 18 |
| Operating Ambient Temperature | TA | -40 |  | 105 | °C |  | 18 |
| Normal Mode supply current | IDD |  | 12.9 | 15 | mA | FSYSCLK = 72 MHz (HFOSC1) | 19 |
| Normal Mode supply current | IDD |  | 4.2 | 5 | mA | FSYSCLK = 24.5 MHz (HFOSC0) | 19 |
| Normal Mode supply current | IDD |  | 625 | 1050 | μA | FSYSCLK = 1.53 MHz (HFOSC0) | 19 |
| Normal Mode supply current | IDD |  | 155 | 575 | μA | FSYSCLK = 80 kHz | 19 |
| Idle Mode supply current | IDD |  | 9.6 | 11.1 | mA | FSYSCLK = 72 MHz (HFOSC1) | 19 |
| Idle Mode supply current | IDD |  | 3.14 | 3.8 | mA | FSYSCLK = 24.5 MHz (HFOSC0) | 19 |
| Idle Mode supply current | IDD |  | 520 | 950 | μA | FSYSCLK = 1.53 MHz (HFOSC0) | 19 |
| Idle Mode supply current | IDD |  | 135 | 550 | μA | FSYSCLK = 80 kHz | 19 |
| Suspend Mode supply current | IDD |  | 125 | 545 | μA | LFO Running | 19 |
| Suspend Mode supply current | IDD |  | 120 | 535 | μA | LFO Stopped | 19 |
| Snooze Mode supply current | IDD |  | 23 | 430 | μA | LFO Running | 19 |
| Snooze Mode supply current | IDD |  | 19 | 425 | μA | LFO Stopped | 19 |
| Stop Mode supply current | IDD |  | 120 | 535 | μA |  | 19 |
| Shutdown Mode supply current | IDD |  | 0.2 | 2.1 | μA |  | 19 |
| High-Frequency Oscillator 0 current | IHFOSC0 |  | 120 | 135 | μA | Operating at 24.5 MHz, TA = 25 °C | 19 |
| High-Frequency Oscillator 1 current | IHFOSC1 |  | 1285 | 1340 | μA | Operating at 72 MHz, TA = 25 °C | 19 |
| Low-Frequency Oscillator current | ILFOSC |  | 3.7 | 6 | μA | Operating at 80 kHz, TA = 25 °C | 19 |
| ADC Throughput Rate (High Speed Mode) | fS |  |  | 900 | ksps | 14 Bit Mode | 24 |
| ADC Throughput Rate (High Speed Mode) | fS |  |  | 1 | Msps | 12 Bit Mode | 24 |
| ADC Throughput Rate (High Speed Mode) | fS |  |  | 1.125 | Msps | 10 Bit Mode | 24 |
| ADC Throughput Rate (Low Power Mode) | fS |  |  | 320 | ksps | 14 Bit Mode | 24 |
| ADC Throughput Rate (Low Power Mode) | fS |  |  | 340 | ksps | 12 Bit Mode | 24 |
| ADC Throughput Rate (Low Power Mode) | fS |  |  | 360 | ksps | 10 Bit Mode | 24 |
| ADC Power-On Time | tPWR | 1.2 |  |  | μs |  | 24 |
| ADC SAR Clock Frequency | fSAR |  |  | 18.36 | MHz | High Speed Mode | 24 |
| ADC SAR Clock Frequency | fSAR |  |  | 12.25 | MHz | Low Power Mode | 24 |
| ADC Voltage Reference Range | VREF | 1 |  |  | V | max is VIO | 24 |
| ADC INL | INL | -1.9 |  | 1.9 | LSB | 12 Bit Mode | 25 |
| ADC INL | INL | -0.6 |  | 0.6 | LSB | 10 Bit Mode | 25 |
| ADC DNL | DNL | -0.9 |  | 0.9 | LSB | 12 Bit Mode | 25 |
| ADC DNL | DNL | -0.5 |  | 0.5 | LSB | 10 Bit Mode | 25 |
| ADC Offset Error | EOFF | -2 | 0 | 2 | LSB | 12 Bit Mode | 25 |
| ADC Offset Error | EOFF | -1 | 0 | 1 | LSB | 10 Bit Mode | 25 |
| ADC Slope Error | EM | -2.6 |  | 2.6 | LSB | 12 Bit Mode | 25 |
| ADC Slope Error | EM | -1.1 |  | 1.1 | LSB | 10 Bit Mode | 25 |
| ADC SNR | SNR | 64 | 68 |  | dB | 12 Bit Mode | 25 |
| ADC SNR | SNR | 59 | 61 |  | dB | 10 Bit Mode | 25 |
| ADC SNDR | SNDR | 64 | 68 |  | dB | 12 Bit Mode | 25 |
| ADC SNDR | SNDR | 59 | 61 |  | dB | 10 Bit Mode | 25 |
| Internal Fast Settling Reference Output Voltage | VREFFS | 1.62 | 1.65 | 1.68 | V | Full Temperature and Supply Range | 27 |
| Turn-on Time (fast reference) | tREFFS |  |  | 1.5 | μs |  | 27 |
| Precision Reference Valid Supply Range | VDD | 2.2 |  | 3.6 | V | 1.2 V Output | 27 |
| Precision Reference Valid Supply Range | VDD | 2.7 |  | 3.6 | V | 2.4 V Output | 27 |
| On-chip Precision Reference Output Voltage | VREFP | 1.195 | 1.2 | 1.205 | V | 1.2 V Output, VDD = 3.3 V, T = 25 °C | 27 |
| On-chip Precision Reference Output Voltage | VREFP | 1.18 | 1.2 | 1.22 | V | 1.2 V Output | 27 |
| On-chip Precision Reference Output Voltage | VREFP | 2.39 | 2.4 | 2.41 | V | 2.4 V Output, VDD = 3.3 V, T = 25 °C | 27 |
| On-chip Precision Reference Output Voltage | VREFP | 2.36 | 2.4 | 2.44 | V | 2.4 V Output | 27 |
| Reference Load Capacitor | CVREFP | 0.1 |  |  | µF | Load = 0 to 200 µA to GND | 27 |
| Reference Short-circuit current | ISCVREFP |  |  | 8 | mA |  | 27 |
| Temp Sensor Error | ETOT | -2.6 |  | 1.8 | °C | T = 0 °C to 70 °C | 28 |
| Temp Sensor Error | ETOT | -2.9 |  | 2.7 | °C | T = -20 °C to 85 °C | 28 |
| Temp Sensor Error | ETOT | -3.2 |  | 4.2 | °C | T = -40 °C to 105 °C | 28 |
| 1.8 V LDO Output Voltage | VOUT_1.8V | 1.79 | 1.84 | 1.88 | V |  | 28 |
| Thermal Resistance Junction to Ambient | θJA |  | 30 |  | °C/W | QFN24 Packages | 35 |
| Thermal Resistance Junction to Case | θJC |  | 32.8 |  | °C/W | QFN24 Packages | 35 |
| Ambient Temperature Under Bias | TBIAS | -55 |  | 125 | °C |  | 36 |
| Storage Temperature | TSTG | -65 |  | 150 | °C |  | 36 |
| Voltage on VDD | VDD | -0.3 |  | 4.2 | V | min printed as GND-0.3 | 36 |
| Voltage on VIO | VIO | -0.3 |  |  | V | GND-0.3 to VDD+0.3 | 36 |
| Voltage on I/O pins or RSTb (excl. P2.0-P2.3) | VIN | -0.3 |  | 5.8 | V | VIO > 3.3 V; min printed GND-0.3 | 36 |
| Voltage on I/O pins or RSTb (excl. P2.0-P2.3) | VIN | -0.3 |  |  | V | VIO < 3.3 V; GND-0.3 to VIO+2.5 | 36 |
| Voltage on P2.0-P2.3 (QFN24) | VIN | -0.3 |  |  | V | GND-0.3 to VDD+0.3 | 36 |
| Total Current Sunk into Supply Pin | IVDD |  |  | 400 | mA |  | 36 |
| Total Current Sourced out of Ground Pin | IGND | 400 |  |  | mA |  | 36 |
| Current Sourced or Sunk by any I/O Pin or RSTb | IIO | -100 |  | 100 | mA |  | 36 |
| Operating Junction Temperature | TJ | -40 |  | 130 | °C | TA = -40 °C to 105 °C | 36 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC |  | 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body Components. | 60 |

## CAD (KiCad official)

- Symbol: `EFM8LB11F16ES0-C-QFN24R`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_3x3mm_P0.4mm_EP1.75x1.6mm`
- 3D model: QFN-24-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `efm8lb11f16es0-c-qfn24r-etched.step` / `efm8lb11f16es0-c-qfn24r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `efm8lb11f16es0-c-qfn24r.step` / `efm8lb11f16es0-c-qfn24r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [SILICON LABS datasheet](docs/efm8lb11f16es0-c-qfn24r-datasheet.pdf) (77 pp, sha256 `4bb882f3cda45564`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/efm8lb11f16es0-c-qfn24r-datasheet.pdf)