main
Ray Publish 0.1.0 299af81
{
  "slug": "dspic33fj16gs402-i",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "single chip microcomputer-microcontroller",
    "dspic33fj16gs402-i",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dspic33fj16gs402-i.kicad_sym",
    "dspic33fj16gs402-i.kicad_mod",
    "dspic33fj16gs402-i.glb",
    "dspic33fj16gs402-i.step",
    "dspic33fj16gs402-i.lbr",
    "docs/hero.png",
    "docs/dspic33fj16gs402-i-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dspic33fj16gs402-i-hero.glb",
    "dspic33fj16gs402-i-hero.overlay.json",
    "dspic33fj16gs402-i-etched.glb"
  ],
  "component": {
    "mpn": "dsPIC33FJ16GS402-I",
    "manufacturer": "Microchip Tech",
    "package": "SOIC-28-300mil",
    "pin_count": 28,
    "category": "Single Chip Microcomputer/Microcontroller",
    "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/f14557c894834099a66fa4bded6e56d7.pdf",
    "parts": {
      "symbol": "dspic33fj16gs402-i.kicad_sym",
      "footprint": "dspic33fj16gs402-i.kicad_mod",
      "model_3d": "dspic33fj16gs402-i-hero.glb",
      "model_3d_plain": "dspic33fj16gs402-i-etched.glb",
      "model_3d_step": "dspic33fj16gs402-i-etched.step",
      "model_3d_step_plain": "dspic33fj16gs402-i.step",
      "lbr": "dspic33fj16gs402-i.lbr"
    },
    "distributor_links": {
      "lcsc": "C646027"
    },
    "distributor_check": {
      "checked_at": "2026-10-31T09:25:14Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "MCLR",
        "type": "input",
        "description": "Active-low Master Clear (Reset) input to the device, also used for programming and debugging; 5V tolerant."
      },
      {
        "number": "2",
        "name": "AN0/RA0",
        "type": "bidirectional",
        "description": "Analog input channel 0 shared with PORTA bidirectional I/O RA0."
      },
      {
        "number": "3",
        "name": "AN1/RA1",
        "type": "bidirectional",
        "description": "Analog input channel 1 shared with PORTA bidirectional I/O RA1."
      },
      {
        "number": "4",
        "name": "AN2/RA2",
        "type": "bidirectional",
        "description": "Analog input channel 2 shared with PORTA bidirectional I/O RA2."
      },
      {
        "number": "5",
        "name": "AN3/RP0/CN0/RB0",
        "type": "bidirectional",
        "description": "Analog input 3, remappable pin RP0, change notification CN0 and PORTB I/O RB0."
      },
      {
        "number": "6",
        "name": "AN4/RP9/CN9/RB9",
        "type": "bidirectional",
        "description": "Analog input 4, remappable pin RP9, change notification CN9 and PORTB I/O RB9."
      },
      {
        "number": "7",
        "name": "AN5/RP10/CN10/RB10",
        "type": "bidirectional",
        "description": "Analog input 5, remappable pin RP10, change notification CN10 and PORTB I/O RB10."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference for logic and I/O pins; must always be connected."
      },
      {
        "number": "9",
        "name": "OSC1/CLKIN/AN6/RP1/CN1/RB1",
        "type": "bidirectional",
        "description": "Oscillator crystal input or external clock input (CLKIN), shared with analog input AN6, RP1, CN1 and RB1."
      },
      {
        "number": "10",
        "name": "OSC2/CLKO/AN7/RP2/CN2/RB2",
        "type": "bidirectional",
        "description": "Oscillator crystal output or CLKO, shared with analog input AN7, RP2, CN2 and RB2."
      },
      {
        "number": "11",
        "name": "PGED2/INT0/RP3/CN3/RB3",
        "type": "bidirectional",
        "description": "ICSP data I/O for programming/debugging channel 2, shared with external interrupt 0, RP3, CN3 and RB3."
      },
      {
        "number": "12",
        "name": "PGEC2/RP4/CN4/RB4",
        "type": "bidirectional",
        "description": "ICSP clock input for programming/debugging channel 2, shared with RP4, CN4 and RB4; 5V tolerant."
      },
      {
        "number": "13",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply for peripheral logic and I/O pins, 3.0V to 3.6V."
      },
      {
        "number": "14",
        "name": "PGED3/RP8/CN8/RB8",
        "type": "bidirectional",
        "description": "ICSP data I/O for programming/debugging channel 3, shared with RP8, CN8 and RB8; 5V tolerant."
      },
      {
        "number": "15",
        "name": "PGEC3/RP15/CN15/RB15",
        "type": "bidirectional",
        "description": "ICSP clock input for programming/debugging channel 3, shared with RP15, CN15 and RB15; 5V tolerant."
      },
      {
        "number": "16",
        "name": "TDO/RP5/CN5/RB5",
        "type": "bidirectional",
        "description": "JTAG test data output shared with RP5, CN5 and RB5."
      },
      {
        "number": "17",
        "name": "PGED1/TDI/SCL1/RP6/CN6/RB6",
        "type": "bidirectional",
        "description": "ICSP data I/O channel 1, JTAG TDI and I2C1 clock, shared with RP6, CN6 and RB6; 5V tolerant."
      },
      {
        "number": "18",
        "name": "PGEC1/SDA1/RP7/CN7/RB7",
        "type": "bidirectional",
        "description": "ICSP clock input channel 1 and I2C1 data, shared with RP7, CN7 and RB7; 5V tolerant."
      },
      {
        "number": "19",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference for logic and I/O pins; must always be connected."
      },
      {
        "number": "20",
        "name": "VCAP",
        "type": "passive",
        "description": "CPU logic filter capacitor connection; needs a low-ESR (<5 Ohm) 4.7 uF to 10 uF capacitor to ground and must not be connected to VDD."
      },
      {
        "number": "21",
        "name": "TMS/PWM3H/RP11/CN11/RB11",
        "type": "bidirectional",
        "description": "JTAG test mode select and PWM3 high output, shared with RP11, CN11 and RB11; 5V tolerant."
      },
      {
        "number": "22",
        "name": "TCK/PWM3L/RP12/CN12/RB12",
        "type": "bidirectional",
        "description": "JTAG test clock input and PWM3 low output, shared with RP12, CN12 and RB12; 5V tolerant."
      },
      {
        "number": "23",
        "name": "PWM2H/RP13/CN13/RB13",
        "type": "bidirectional",
        "description": "PWM2 high output shared with RP13, CN13 and RB13; 5V tolerant."
      },
      {
        "number": "24",
        "name": "PWM2L/RP14/CN14/RB14",
        "type": "bidirectional",
        "description": "PWM2 low output shared with RP14, CN14 and RB14; 5V tolerant."
      },
      {
        "number": "25",
        "name": "PWM1H/RA4",
        "type": "bidirectional",
        "description": "PWM1 high output shared with PORTA I/O RA4; 5V tolerant."
      },
      {
        "number": "26",
        "name": "PWM1L/RA3",
        "type": "bidirectional",
        "description": "PWM1 low output shared with PORTA I/O RA3; 5V tolerant."
      },
      {
        "number": "27",
        "name": "AVSS",
        "type": "power_in",
        "description": "Ground reference for analog modules, connected to VSS; must always be connected."
      },
      {
        "number": "28",
        "name": "AVDD",
        "type": "power_in",
        "description": "Positive supply for analog modules, connected to VDD; must be connected at all times."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text+vision",
        "consensus_model": "claude-opus-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package drawing pages for the 28-lead SOIC were not legible in the provided text; the pin-to-number ",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 66,
        "cost_usd": 2.605,
        "at": "2026-10-31T09:24:52"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/f14557c894834099a66fa4bded6e56d7.pdf",
        "pages": 398,
        "sha256": "3caa457741930be8",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 28,
        "described": 28,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dspic33fj16gs402-i.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          10.3,
          17.9,
          2.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b889a13dbe9ec59e79fa9f1b5118b00bfa54f9582392335ff3365b64afc264b1",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dspic33fj16gs402-i-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          10.3,
          17.9,
          2.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ebdf9213f0b2cad9bdce78d21b9cf49936e6687fe56311d1290b2227c726d702",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}