DS92LV18TVV

{
  "slug": "ds92lv18tvv",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Serializers / Deserializers, LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface ics",
    "ds92lv18tvv",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
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    "README.md",
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    "ds92lv18tvv.glb",
    "ds92lv18tvv.step",
    "ds92lv18tvv.lbr",
    "docs/hero.png",
    "docs/ds92lv18tvv-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ds92lv18tvv-hero.glb",
    "ds92lv18tvv-hero.overlay.json",
    "ds92lv18tvv-etched.glb"
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  "component": {
    "mpn": "DS92LV18TVV",
    "manufacturer": "Texas Instruments",
    "package": "LQFP-80(12x12)",
    "pin_count": 80,
    "category": "Interface ICs",
    "subcategory": "Serializers / Deserializers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/ds92lv18tvv.pdf",
    "parts": {
      "symbol": "ds92lv18tvv.kicad_sym",
      "footprint": "ds92lv18tvv.kicad_mod",
      "model_3d": "ds92lv18tvv-hero.glb",
      "model_3d_plain": "ds92lv18tvv-etched.glb",
      "model_3d_step": "ds92lv18tvv-etched.step",
      "model_3d_step_plain": "ds92lv18tvv.step",
      "lbr": "ds92lv18tvv.lbr"
    },
    "distributor_links": {
      "lcsc": "C1522510",
      "mouser": "926-DS92LV18TVV"
    },
    "distributor_check": {
      "checked_at": "2026-10-28T16:36:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": "926-DS92LV18TVV",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "RPWDN",
        "type": "input",
        "description": "Driving RPWDN low puts the receiver in low-power standby mode and the receiver PLL loses lock."
      },
      {
        "number": "2",
        "name": "REN",
        "type": "input",
        "description": "REN low disables the receiver outputs while the receiver PLL remains locked."
      },
      {
        "number": "3",
        "name": "DIN17",
        "type": "input",
        "description": "Transmitter parallel data input bit 17, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "4",
        "name": "REFCLK",
        "type": "input",
        "description": "Frequency reference clock input for the receiver, which must be running for the deserializer to lock to incoming data."
      },
      {
        "number": "5",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog voltage supply for the LVDS section of the device."
      },
      {
        "number": "6",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground for the LVDS section, connected to signal common in the cable for common-mode return."
      },
      {
        "number": "7",
        "name": "RIN+",
        "type": "input",
        "description": "Receiver LVDS true serial input."
      },
      {
        "number": "8",
        "name": "RIN-",
        "type": "input",
        "description": "Receiver LVDS inverting serial input."
      },
      {
        "number": "9",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground for the LVDS section, connected to signal common in the cable for common-mode return."
      },
      {
        "number": "10",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog voltage supply for the LVDS section of the device."
      },
      {
        "number": "11",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog voltage supply for the LVDS section of the device."
      },
      {
        "number": "12",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground for the LVDS section, connected to signal common in the cable for common-mode return."
      },
      {
        "number": "13",
        "name": "DO+",
        "type": "output",
        "description": "Transmitter LVDS true serial output, disabled during local loopback and tri-stated when DEN is low."
      },
      {
        "number": "14",
        "name": "DO-",
        "type": "output",
        "description": "Transmitter LVDS inverting serial output, disabled during local loopback and tri-stated when DEN is low."
      },
      {
        "number": "15",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog voltage supply for the LVDS section of the device."
      },
      {
        "number": "16",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground for the LVDS section, connected to signal common in the cable for common-mode return."
      },
      {
        "number": "17",
        "name": "TCLK",
        "type": "input",
        "description": "Transmitter reference clock used to strobe DIN inputs and drive the transmitter PLL."
      },
      {
        "number": "18",
        "name": "DIN16",
        "type": "input",
        "description": "Transmitter parallel data input bit 16, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "19",
        "name": "DEN",
        "type": "input",
        "description": "DEN low disables the transmitter outputs while the transmitter PLL remains locked."
      },
      {
        "number": "20",
        "name": "SYNC",
        "type": "input",
        "description": "SYNC high makes the transmitter ignore data inputs and send SYNC patterns to provide a locking reference to the receiver."
      },
      {
        "number": "21",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "22",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "23",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "24",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "25",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "26",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "27",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "28",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "29",
        "name": "PGND",
        "type": "power_in",
        "description": "PLL ground for the transmitter and receiver PLL circuits."
      },
      {
        "number": "30",
        "name": "PVDD",
        "type": "power_in",
        "description": "PLL voltage supply, which requires clean power to minimize jitter."
      },
      {
        "number": "31",
        "name": "PVDD",
        "type": "power_in",
        "description": "PLL voltage supply, which requires clean power to minimize jitter."
      },
      {
        "number": "32",
        "name": "PGND",
        "type": "power_in",
        "description": "PLL ground for the transmitter and receiver PLL circuits."
      },
      {
        "number": "33",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "34",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "35",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "36",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "37",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "38",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "39",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "40",
        "name": "DIN",
        "type": "input",
        "description": "Transmitter parallel data input, strobed by TCLK and ignored when SYNC is high."
      },
      {
        "number": "41",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground for the device and receiver output buffers."
      },
      {
        "number": "42",
        "name": "TPWDN",
        "type": "input",
        "description": "TPWDN low puts the transmitter in low-power standby mode and the transmitter PLL loses lock."
      },
      {
        "number": "43",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital voltage supply for the device and receiver output buffers, requiring local bypass of 0.1uF per pin."
      },
      {
        "number": "44",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground for the device and receiver output buffers."
      },
      {
        "number": "45",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "46",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "47",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "48",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "49",
        "name": "RCLK",
        "type": "output",
        "description": "Recovered parallel-rate LVCMOS clock used to strobe ROUT(0:17), asserted HIGH on failsafe."
      },
      {
        "number": "50",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital voltage supply for the device and receiver output buffers, requiring local bypass of 0.1uF per pin."
      },
      {
        "number": "51",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground for the device and receiver output buffers."
      },
      {
        "number": "52",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground for the device and receiver output buffers."
      },
      {
        "number": "53",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital voltage supply for the device and receiver output buffers, requiring local bypass of 0.1uF per pin."
      },
      {
        "number": "54",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "55",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "56",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "57",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "58",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital voltage supply for the device and receiver output buffers, requiring local bypass of 0.1uF per pin."
      },
      {
        "number": "59",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground for the device and receiver output buffers."
      },
      {
        "number": "60",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground for the device and receiver output buffers."
      },
      {
        "number": "61",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground for the device and receiver output buffers."
      },
      {
        "number": "62",
        "name": "ROUT16",
        "type": "output",
        "description": "Receiver parallel data output bit 16, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "63",
        "name": "LOCK",
        "type": "output",
        "description": "Receiver PLL status output, high when the receiver PLL is unlocked and low when locked."
      },
      {
        "number": "64",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "65",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "66",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "67",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "68",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground for the device and receiver output buffers."
      },
      {
        "number": "69",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital voltage supply for the device and receiver output buffers, requiring local bypass of 0.1uF per pin."
      },
      {
        "number": "70",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "71",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "72",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "73",
        "name": "ROUT",
        "type": "output",
        "description": "Receiver parallel data output, asserted HIGH on failsafe and tri-stated when REN is low."
      },
      {
        "number": "74",
        "name": "PGND",
        "type": "power_in",
        "description": "PLL ground for the transmitter and receiver PLL circuits."
      },
      {
        "number": "75",
        "name": "PVDD",
        "type": "power_in",
        "description": "PLL voltage supply, which requires clean power to minimize jitter."
      },
      {
        "number": "76",
        "name": "PGND",
        "type": "power_in",
        "description": "PLL ground for the transmitter and receiver PLL circuits."
      },
      {
        "number": "77",
        "name": "PVDD",
        "type": "power_in",
        "description": "PLL voltage supply, which requires clean power to minimize jitter."
      },
      {
        "number": "78",
        "name": "LINE_LE",
        "type": "input",
        "description": "LINE_LE high enables receiver loopback, feeding RIN± data back through the DO± outputs."
      },
      {
        "number": "79",
        "name": "LOCAL_LE",
        "type": "input",
        "description": "LOCAL_LE high enables transmitter loopback, feeding DIN data back through the ROUT outputs."
      },
      {
        "number": "80",
        "name": "ROUT17",
        "type": "output",
        "description": "Receiver parallel data output bit 17, asserted HIGH on failsafe and tri-stated when REN is low."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet gives the DIN(0:17) and ROUT(0:17) groups without a per-pin bit mapping, except that p; The datasheet text does not state the 12x12 body size of the LQFP-80 package; it only says 80-Pin LQ; Operating conditions and electrical ratings (supply voltage range, current, temperature) are not in "
        ],
        "pages_sent": 10,
        "cost_usd": 0.0418,
        "at": "2026-10-28T16:36:01"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/ds92lv18tvv.pdf",
        "pages": 29,
        "sha256": "006330896207a53d",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 80,
        "described": 80,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "zmin_mm": 0.0,
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        "footprint_binding": "identity",
        "sha256": "f782bdbc6327d920be33e2b9906695d7c3690117933775c3f145eac71f2013ac",
        "checked": "2026-10-28",
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        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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  }
}