component
DS90UB948TNKDTQ1
Public Made by Adomby adom
Texas Instruments Serializers / Deserializers, WQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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{
"schema_version": 1,
"type": "component",
"slug": "ds90ub948tnkdtq1",
"title": "DS90UB948TNKDTQ1",
"brief": "Texas Instruments Serializers / Deserializers, WQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"communication interface chip-uart-485-232",
"ds90ub948tnkdtq1",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "DS90UB948TNKDTQ1",
"manufacturer": "Texas Instruments",
"package": "WQFN-64-EP(9x9)",
"pin_count": 65,
"category": "Communication Interface Chip/UART/485/232",
"subcategory": "Serializers / Deserializers",
"datasheet": "https://www.ti.com/lit/ds/symlink/ds90ub948-q1.pdf",
"parts": {
"symbol": "ds90ub948tnkdtq1.kicad_sym",
"footprint": "ds90ub948tnkdtq1.kicad_mod",
"model_3d": "ds90ub948tnkdtq1-hero.glb",
"model_3d_plain": "ds90ub948tnkdtq1-etched.glb",
"model_3d_step": "ds90ub948tnkdtq1-etched.step",
"model_3d_step_plain": "ds90ub948tnkdtq1.step",
"lbr": "ds90ub948tnkdtq1.lbr"
},
"distributor_links": {
"lcsc": "C2652229",
"digikey": "296-40106-2-ND",
"mouser": "595-DS90UB948TNKDTQ1"
},
"distributor_check": {
"checked_at": "2026-11-05T21:25:02Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-40106-2-ND",
"status": "found"
},
"mouser": {
"pn": "595-DS90UB948TNKDTQ1",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "LOCK",
"type": "output",
"description": "Lock status output: high when the PLL has locked to the reference clock input, low when unlocked."
},
{
"number": "2",
"name": "CAP_I2S",
"type": "passive",
"description": "Decoupling capacitor connection for the on-chip regulator; datasheet recommends a 0.1-µF decoupling capacitor to GND."
},
{
"number": "3",
"name": "VDDIO",
"type": "power_in",
"description": "LVCMOS I/O supply, 1.8 V (±5%) or 3.3 V (±10%); requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND."
},
{
"number": "4",
"name": "BISTC / INTB_IN",
"type": "input",
"description": "Multifunction pin: BIST clock select (0 = PCLK, 1 = 33 MHz) or interrupt input INTB_IN depending on register setting; weak 3-µA internal pulldown."
},
{
"number": "5",
"name": "BISTEN",
"type": "input",
"description": "BIST enable: 0 disables BIST mode, 1 enables BIST mode; weak 3-µA internal pulldown, tie to pulldown if unused."
},
{
"number": "6",
"name": "VDDL12_0",
"type": "power_in",
"description": "1.2-V (±5%) supply; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND at each VDD pin."
},
{
"number": "7",
"name": "SDOUT / GPIO0 / PASS",
"type": "bidirectional",
"description": "Multifunction pin: AA-mode I2S data output (SDOUT), GPIO0 (default logic LOW), or BIST PASS status output (PASS = 1 no error, 0 error detected)."
},
{
"number": "8",
"name": "SWC / GPIO1",
"type": "bidirectional",
"description": "Multifunction pin: AA-mode I2S word clock output or GPIO1 (default logic LOW), with weak 3-µA internal pulldown."
},
{
"number": "9",
"name": "I2S_DD / GPIO3",
"type": "bidirectional",
"description": "Multifunction pin: SS-mode I2S data output or GPIO3 (default logic LOW), with weak 3-µA internal pulldown."
},
{
"number": "10",
"name": "I2S_DC / GPIO2",
"type": "bidirectional",
"description": "Multifunction pin: SS-mode I2S data output or GPIO2 (default logic LOW), with weak 3-µA internal pulldown."
},
{
"number": "11",
"name": "I2S_DB / GPIO5_REG",
"type": "bidirectional",
"description": "Multifunction pin: SS-mode I2S data output or high-speed GPIO5 (I2C register control only, default logic LOW)."
},
{
"number": "12",
"name": "I2S_DA / GPIO6_REG",
"type": "bidirectional",
"description": "Multifunction pin: SS-mode I2S data output or high-speed GPIO6 (I2C register control only, default logic LOW)."
},
{
"number": "13",
"name": "I2S_CLK / GPIO8_REG",
"type": "bidirectional",
"description": "Multifunction pin: SS-mode I2S clock output or high-speed GPIO8 (I2C register control only, default logic LOW); disable the I2S jitter cleaner via 0x2B[7]=1 when used as I2S clock."
},
{
"number": "14",
"name": "I2S_WC / GPIO7_REG",
"type": "bidirectional",
"description": "Multifunction pin: SS-mode I2S word clock output or high-speed GPIO7 (I2C register control only, default logic LOW)."
},
{
"number": "15",
"name": "MCLK / GPIO9",
"type": "bidirectional",
"description": "Multifunction pin: AA-mode I2S system clock output or GPIO9 (default logic LOW), with weak 3-µA internal pulldown."
},
{
"number": "16",
"name": "D_GPIO3/CS",
"type": "bidirectional",
"description": "SPI peripheral select or high-speed GPIO3 (Dual Link Mode only, default tri-state), with weak 3-µA internal pulldown."
},
{
"number": "17",
"name": "D_GPIO2/SPLK",
"type": "bidirectional",
"description": "SPI clock or high-speed GPIO2 (Dual Link Mode only, default tri-state), with weak 3-µA internal pulldown."
},
{
"number": "18",
"name": "D_GPIO1/POCI",
"type": "bidirectional",
"description": "SPI controller input, peripheral output, or high-speed GPIO1 (Dual Link Mode only, default tri-state), with weak 3-µA internal pulldown."
},
{
"number": "19",
"name": "D_GPIO0/PICO",
"type": "bidirectional",
"description": "SPI controller output, peripheral input, or high-speed GPIO0 (Dual Link Mode only, default tri-state), with weak 3-µA internal pulldown."
},
{
"number": "20",
"name": "VDD12_LVDS",
"type": "power_in",
"description": "1.2-V (±5%) supply; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND."
},
{
"number": "21",
"name": "D7+",
"type": "output",
"description": "OpenLDI differential data output D7+; requires external 100-Ω termination for LVDS or leave unused as no connect."
},
{
"number": "22",
"name": "D7-",
"type": "output",
"description": "OpenLDI differential data output D7-; requires external 100-Ω termination for LVDS or leave unused as no connect."
},
{
"number": "23",
"name": "CLK2+",
"type": "output",
"description": "OpenLDI differential clock output CLK2+; requires external 100-Ω termination for LVDS."
},
{
"number": "24",
"name": "CLK2-",
"type": "output",
"description": "OpenLDI differential clock output CLK2-; requires external 100-Ω termination for LVDS."
},
{
"number": "25",
"name": "D6+",
"type": "output",
"description": "OpenLDI differential data output D6+; requires external 100-Ω termination for LVDS."
},
{
"number": "26",
"name": "D6-",
"type": "output",
"description": "OpenLDI differential data output D6-; requires external 100-Ω termination for LVDS."
},
{
"number": "27",
"name": "D5+",
"type": "output",
"description": "OpenLDI differential data output D5+; requires external 100-Ω termination for LVDS."
},
{
"number": "28",
"name": "D5-",
"type": "output",
"description": "OpenLDI differential data output D5-; requires external 100-Ω termination for LVDS."
},
{
"number": "29",
"name": "D4+",
"type": "output",
"description": "OpenLDI differential data output D4+; requires external 100-Ω termination for LVDS."
},
{
"number": "30",
"name": "D4-",
"type": "output",
"description": "OpenLDI differential data output D4-; requires external 100-Ω termination for LVDS."
},
{
"number": "31",
"name": "VDD33_B",
"type": "power_in",
"description": "3.3-V (±10%) supply powering the on-chip regulator; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND."
},
{
"number": "32",
"name": "VDDP12_LVDS",
"type": "power_in",
"description": "1.2-V (±5%) supply for the LVDS output; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND."
},
{
"number": "33",
"name": "VDD25_CAP",
"type": "passive",
"description": "Decoupling capacitor connection for the on-chip regulator; datasheet recommends a 0.1-µF decoupling capacitor to GND."
},
{
"number": "34",
"name": "D3+",
"type": "output",
"description": "OpenLDI differential data output D3+; requires external 100-Ω termination for LVDS."
},
{
"number": "35",
"name": "D3-",
"type": "output",
"description": "OpenLDI differential data output D3-; requires external 100-Ω termination for LVDS."
},
{
"number": "36",
"name": "CLK1+",
"type": "output",
"description": "OpenLDI differential clock output CLK1+; requires external 100-Ω termination for LVDS."
},
{
"number": "37",
"name": "CLK1-",
"type": "output",
"description": "OpenLDI differential clock output CLK1-; requires external 100-Ω termination for LVDS."
},
{
"number": "38",
"name": "D2+",
"type": "output",
"description": "OpenLDI differential data output D2+; requires external 100-Ω termination for LVDS."
},
{
"number": "39",
"name": "D2-",
"type": "output",
"description": "OpenLDI differential data output D2-; requires external 100-Ω termination for LVDS."
},
{
"number": "40",
"name": "D1+",
"type": "output",
"description": "OpenLDI differential data output D1+; requires external 100-Ω termination for LVDS."
},
{
"number": "41",
"name": "D1-",
"type": "output",
"description": "OpenLDI differential data output D1-; requires external 100-Ω termination for LVDS."
},
{
"number": "42",
"name": "D0+",
"type": "output",
"description": "OpenLDI differential data output D0+; requires external 100-Ω termination for LVDS."
},
{
"number": "43",
"name": "D0-",
"type": "output",
"description": "OpenLDI differential data output D0-; requires external 100-Ω termination for LVDS."
},
{
"number": "44",
"name": "VDDL12_1",
"type": "power_in",
"description": "1.2-V (±5%) supply; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND at each VDD pin."
},
{
"number": "45",
"name": "I2C_SCL",
"type": "bidirectional",
"description": "I2C clock, open-drain; requires external pullup to VI2C (2.2 kΩ for 1.8 V or 4.7 kΩ for 3.3 V) and must not float."
},
{
"number": "46",
"name": "I2C_SDA",
"type": "bidirectional",
"description": "I2C data, open-drain; requires external pullup to VI2C (2.2 kΩ for 1.8 V or 4.7 kΩ for 3.3 V) and must not float."
},
{
"number": "47",
"name": "IDx",
"type": "input",
"description": "I2C serial control bus device ID address select, set with a voltage divider from a pullup to VDD33 and a pulldown to GND (Table 7-11)."
},
{
"number": "48",
"name": "PDB",
"type": "input",
"description": "Inverted power-down input: HIGH enables the device, LOW powers it down; default weak pulldown above 100 kΩ, and PDB should stay low until supplies reach minimum levels."
},
{
"number": "49",
"name": "RES0",
"type": "unconnected",
"description": "Reserved pin; may be left floating as no connect, or a 0.1-µF decoupling capacitor may be placed to GND."
},
{
"number": "50",
"name": "MODE_SEL1",
"type": "input",
"description": "Mode select 1 strap pin, set with a voltage divider from a pullup to VDD33 and a pulldown to GND (Table 7-9)."
},
{
"number": "51",
"name": "VDDP12_CH0",
"type": "power_in",
"description": "1.2-V (±5%) supply for channel 0; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND."
},
{
"number": "52",
"name": "VDDR12_CH0",
"type": "power_in",
"description": "1.2-V (±5%) supply for channel 0; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND."
},
{
"number": "53",
"name": "RIN0+",
"type": "bidirectional",
"description": "FPD-Link III RX port 0 positive pin; must be AC-coupled per Table 8-1, and leave unused pins as no connect with no external pullup or pulldown."
},
{
"number": "54",
"name": "RIN0-",
"type": "bidirectional",
"description": "FPD-Link III RX port 0 negative pin; must be AC-coupled per Table 8-1, and leave unused pins as no connect with no external pullup or pulldown."
},
{
"number": "55",
"name": "CMF",
"type": "bidirectional",
"description": "Common mode filter; connect a 0.1-µF capacitor to GND."
},
{
"number": "56",
"name": "VDD33_A",
"type": "power_in",
"description": "3.3-V (±10%) supply powering the on-chip regulator; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND."
},
{
"number": "57",
"name": "VDDR12_CH1",
"type": "power_in",
"description": "1.2-V (±5%) supply for channel 1; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND."
},
{
"number": "58",
"name": "RIN1+",
"type": "bidirectional",
"description": "FPD-Link III RX port 1 positive pin; must be AC-coupled per Table 8-1, and leave unused pins as no connect."
},
{
"number": "59",
"name": "RIN1-",
"type": "bidirectional",
"description": "FPD-Link III RX port 1 negative pin; must be AC-coupled per Table 8-1, and leave unused pins as no connect."
},
{
"number": "60",
"name": "VDDP12_CH1",
"type": "power_in",
"description": "1.2-V (±5%) supply for channel 1; requires 10-µF, 1-µF, 0.1-µF and 0.01-µF capacitors to GND."
},
{
"number": "61",
"name": "MODE_SEL0",
"type": "input",
"description": "Mode select 0 strap pin, set with a voltage divider from a pullup to VDD33 and a pulldown to GND (Table 7-8)."
},
{
"number": "62",
"name": "CMLOUTP",
"type": "output",
"description": "Channel monitor loop-through driver positive output; route to a test point or pad with a 100-Ω termination between CMLOUTP and CMLOUTN."
},
{
"number": "63",
"name": "CMLOUTN",
"type": "output",
"description": "Channel monitor loop-through driver negative output; route to a test point or pad with a 100-Ω termination between CMLOUTP and CMLOUTN."
},
{
"number": "64",
"name": "RES1",
"type": "unconnected",
"description": "Reserved pin; may be left floating as no connect, or a 0.1-µF decoupling capacitor may be placed to GND."
},
{
"number": "65",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pinout taken from the NKD 64-pin WQFN pin table (Table 5-1, pages 6-9). The orderable addendum (page"
],
"pages_sent": 19,
"cost_usd": 0.0666,
"at": "2026-11-05T21:24:47"
},
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/ds90ub948-q1.pdf",
"pages": 108,
"sha256": "ebb7858aaf88c0f6",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 65,
"described": 65,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds90ub948tnkdtq1.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
0.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds90ub948tnkdtq1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
0.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "536c4723de02cbe8413fed4a9242116576d64c2ee615ab44d2317568f3576776",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "WQFN-64-EP(9x9)",
"Category": "Communication Interface Chip/UART/485/232",
"Pins": "65"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "ebb7858aaf88c0f69036055967bd675664411bc783d3447d25424c45fe1f1757",
"rows": [
{
"name": "Supply voltage VDD33",
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{
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{
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{
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