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DS90UB940TNKDTQ1
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Texas Instruments LVDS ICs, WQFN-64(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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{
"schema_version": 1,
"type": "component",
"slug": "ds90ub940tnkdtq1",
"title": "DS90UB940TNKDTQ1",
"brief": "Texas Instruments LVDS ICs, WQFN-64(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"ds90ub940tnkdtq1",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "DS90UB940TNKDTQ1",
"manufacturer": "Texas Instruments",
"package": "WQFN-64(9x9)",
"pin_count": 65,
"category": "Interface",
"subcategory": "LVDS ICs",
"datasheet": "https://www.ti.com/cn/lit/gpn/ds90ub940-q1",
"parts": {
"symbol": "ds90ub940tnkdtq1.kicad_sym",
"footprint": "ds90ub940tnkdtq1.kicad_mod",
"model_3d": "ds90ub940tnkdtq1-hero.glb",
"model_3d_plain": "ds90ub940tnkdtq1-etched.glb",
"model_3d_step": "ds90ub940tnkdtq1-etched.step",
"model_3d_step_plain": "ds90ub940tnkdtq1.step",
"lbr": "ds90ub940tnkdtq1.lbr"
},
"distributor_links": {
"lcsc": "C3189882"
},
"distributor_check": {
"checked_at": "2026-10-22T23:05:15Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "deferred",
"error": "shared DigiKey quota guard: 709 calls left today"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "LOCK",
"type": "output",
"description": "LVCMOS lock status output: 1 means PLL acquired lock to the reference clock and DPHY outputs are active, 0 means PLL is unlocked."
},
{
"number": "2",
"name": "CAP_I2S",
"type": "passive",
"description": "Decoupling capacitor connection for the on-chip regulator; requires a 0.1 µF capacitor to GND."
},
{
"number": "3",
"name": "VDDIO",
"type": "power_in",
"description": "LVCMOS I/O power supply, 1.8V (±5%) or 3.3V (±10%), requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "4",
"name": "BISTC/INTB_IN",
"type": "input",
"description": "LVCMOS input with weak internal pull-down; BIST clock select (0: PCLK, 1: 33MHz) shared with interrupt input INTB_IN."
},
{
"number": "5",
"name": "BISTEN",
"type": "input",
"description": "LVCMOS BIST enable input with weak internal pull-down; 0 disables BIST mode, 1 enables BIST mode."
},
{
"number": "6",
"name": "VDDL12_0",
"type": "power_in",
"description": "1.2V (±5%) supply, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "7",
"name": "GPIO0/SDOUT/PASS",
"type": "bidirectional",
"description": "LVCMOS BCC GPIO0 (default logic LOW), shared with master mode I2S data output SDOUT and PASS status output (1: no fault detected)."
},
{
"number": "8",
"name": "GPIO1/SWC",
"type": "bidirectional",
"description": "LVCMOS BCC GPIO1 (default logic LOW), shared with master mode I2S word clock output SWC."
},
{
"number": "9",
"name": "I2S_DD/GPIO3",
"type": "bidirectional",
"description": "LVCMOS BCC GPIO3 (default logic LOW), shared with slave mode I2S data output I2S_DD."
},
{
"number": "10",
"name": "I2S_DC/GPIO2",
"type": "bidirectional",
"description": "LVCMOS BCC GPIO2 (default logic LOW), shared with slave mode I2S data output I2S_DC."
},
{
"number": "11",
"name": "I2S_DB/GPIO5_REG",
"type": "bidirectional",
"description": "LVCMOS general purpose I/O 5 under I2C register control only (default logic LOW), shared with slave mode I2S data output I2S_DB."
},
{
"number": "12",
"name": "I2S_DA/GPIO6_REG",
"type": "bidirectional",
"description": "LVCMOS general purpose I/O 6 under I2C register control only (default logic LOW), shared with slave mode I2S data output I2S_DA."
},
{
"number": "13",
"name": "I2S_CLK/GPIO8_REG",
"type": "bidirectional",
"description": "LVCMOS general purpose I/O 8 under I2C register control only (default logic LOW), shared with slave mode I2S clock output I2S_CLK."
},
{
"number": "14",
"name": "I2S_WC/GPIO7_REG",
"type": "bidirectional",
"description": "LVCMOS general purpose I/O 7 under I2C register control only (default logic LOW), shared with slave mode I2S word clock output I2S_WC."
},
{
"number": "15",
"name": "MCLK",
"type": "output",
"description": "LVCMOS master mode I2S system clock output, shared with GPIO9."
},
{
"number": "16",
"name": "D_GPIO3/SS",
"type": "bidirectional",
"description": "LVCMOS high-speed GPIO3 for 2-lane FPD-Link III mode (default tri-state) with weak internal pull-down, shared with SPI slave select SS."
},
{
"number": "17",
"name": "D_GPIO2/SPLK",
"type": "bidirectional",
"description": "LVCMOS high-speed GPIO2 for 2-lane FPD-Link III mode (default tri-state) with weak internal pull-down, shared with SPI serial clock SPLK."
},
{
"number": "18",
"name": "D_GPIO1/MISO",
"type": "bidirectional",
"description": "LVCMOS high-speed GPIO1 for 2-lane FPD-Link III mode (default tri-state) with weak internal pull-down, shared with SPI Master In Slave Out."
},
{
"number": "19",
"name": "D_GPIO0/MOSI",
"type": "bidirectional",
"description": "LVCMOS high-speed GPIO0 for 2-lane FPD-Link III mode (default tri-state) with weak internal pull-down, shared with SPI Master Out Slave In."
},
{
"number": "20",
"name": "VDD12_CSI0",
"type": "power_in",
"description": "1.2V (±5%) supply, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "21",
"name": "CSI0_CLK-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential clock, negative; float if unused."
},
{
"number": "22",
"name": "CSI0_CLK+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential clock, positive; float if unused."
},
{
"number": "23",
"name": "CSI0_D0-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential data pair 0, negative."
},
{
"number": "24",
"name": "CSI0_D0+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential data pair 0, positive."
},
{
"number": "25",
"name": "CSI0_D1-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential data pair 1, negative."
},
{
"number": "26",
"name": "CSI0_D1+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential data pair 1, positive."
},
{
"number": "27",
"name": "CSI0_D2-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential data pair 2, negative."
},
{
"number": "28",
"name": "CSI0_D2+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential data pair 2, positive."
},
{
"number": "29",
"name": "CSI0_D3-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential data pair 3, negative."
},
{
"number": "30",
"name": "CSI0_D3+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 0 differential data pair 3, positive."
},
{
"number": "31",
"name": "VDD33_B",
"type": "power_in",
"description": "3.3V (±10%) supply to on-chip regulator, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND; not internally connected to VDD33_A."
},
{
"number": "32",
"name": "VDDP12_CSI",
"type": "power_in",
"description": "1.2V (±5%) supply, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "33",
"name": "VDD12_CSI1",
"type": "power_in",
"description": "1.2V (±5%) supply, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "34",
"name": "CSI1_CLK-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential clock, negative; float if unused."
},
{
"number": "35",
"name": "CSI1_CLK+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential clock, positive; float if unused."
},
{
"number": "36",
"name": "CSI1_D0-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential data pair 0, negative."
},
{
"number": "37",
"name": "CSI1_D0+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential data pair 0, positive."
},
{
"number": "38",
"name": "CSI1_D1-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential data pair 1, negative."
},
{
"number": "39",
"name": "CSI1_D1+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential data pair 1, positive."
},
{
"number": "40",
"name": "CSI1_D2-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential data pair 2, negative."
},
{
"number": "41",
"name": "CSI1_D2+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential data pair 2, positive."
},
{
"number": "42",
"name": "CSI1_D3-",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential data pair 3, negative."
},
{
"number": "43",
"name": "CSI1_D3+",
"type": "output",
"description": "MIPI DPHY CSI-2 port 1 differential data pair 3, positive."
},
{
"number": "44",
"name": "VDDL12_1",
"type": "power_in",
"description": "1.2V (±5%) supply, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "45",
"name": "I2C_SCL",
"type": "bidirectional",
"description": "Open-drain I2C clock input/output; needs external pull-up to VDDIO (recommended 4.7 kΩ), do not float."
},
{
"number": "46",
"name": "I2C_SDA",
"type": "bidirectional",
"description": "Open-drain I2C data input/output; needs external pull-up to VDDIO (recommended 4.7 kΩ), do not float."
},
{
"number": "47",
"name": "IDx",
"type": "input",
"description": "Analog configuration input that sets the I2C serial control bus device ID address."
},
{
"number": "48",
"name": "PDB",
"type": "input",
"description": "LVCMOS power-down input with weak internal pull-down: 1 is normal operation, 0 powers the device down; requires minimum ramp time of 200 µs."
},
{
"number": "49",
"name": "CAP_PLL0",
"type": "passive",
"description": "Decoupling capacitor connection for on-chip regulator; requires a 0.1 µF capacitor to GND."
},
{
"number": "50",
"name": "MODE_SEL1",
"type": "input",
"description": "Analog mode select 1 input; set with external pull-up to VDD33 and pull-down to GND as a voltage divider."
},
{
"number": "51",
"name": "VDDP12_CH0",
"type": "power_in",
"description": "1.2V (±5%) supply, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "52",
"name": "VDDR12_CH0",
"type": "power_in",
"description": "1.2V (±5%) supply, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "53",
"name": "RIN0+",
"type": "bidirectional",
"description": "FPD-Link III true CML input/output for channel 0; must be AC-coupled with a 33 nF capacitor."
},
{
"number": "54",
"name": "RIN0-",
"type": "bidirectional",
"description": "FPD-Link III inverting CML input/output for channel 0; must be AC-coupled with a 33 nF capacitor."
},
{
"number": "55",
"name": "CMF",
"type": "bidirectional",
"description": "CML common mode filter pin; connect a 0.1 µF capacitor to GND."
},
{
"number": "56",
"name": "VDD33_A",
"type": "power_in",
"description": "3.3V (±10%) supply to on-chip regulator, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND; not internally connected to VDD33_B."
},
{
"number": "57",
"name": "VDDR12_CH1",
"type": "power_in",
"description": "1.2V (±5%) supply, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "58",
"name": "RIN1+",
"type": "bidirectional",
"description": "FPD-Link III true CML input/output for channel 1; must be AC-coupled with a 33 nF capacitor."
},
{
"number": "59",
"name": "RIN1-",
"type": "bidirectional",
"description": "FPD-Link III inverting CML input/output for channel 1; must be AC-coupled with a 33 nF capacitor."
},
{
"number": "60",
"name": "VDDP12_CH1",
"type": "power_in",
"description": "1.2V (±5%) supply, requires 10 µF, 1 µF, 0.1 µF and 0.01 µF capacitors to GND."
},
{
"number": "61",
"name": "MODE_SEL0",
"type": "input",
"description": "Analog mode select 0 input; set with external pull-up to VDD33 and pull-down to GND as a voltage divider."
},
{
"number": "62",
"name": "CMLOUTP",
"type": "output",
"description": "CML monitor point (positive) for the equalized differential signal; place 0.1 µF series capacitor and 100 Ω termination."
},
{
"number": "63",
"name": "CMLOUTN",
"type": "output",
"description": "CML monitor point (negative) for the equalized differential signal; place 0.1 µF series capacitor and 100 Ω termination."
},
{
"number": "64",
"name": "CAP_PLL1",
"type": "passive",
"description": "Decoupling capacitor connection for on-chip regulator; requires a 0.1 µF capacitor to GND."
},
{
"number": "65",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Datasheet pin table lists CSI1_D0 and CSI1_D1 descriptions as 'pair 1' and 'pair 2' and CSI1_D2/D3 a; CMF is typed as passive-like filter pin but datasheet lists it as I/O, CML; type set to bidirectiona; Orderable MPN DS90UB940TNKDTQ1 (250-piece small reel) uses the same 64-pin NKD WQFN package as the p"
],
"pages_sent": 16,
"cost_usd": 0.2797,
"at": "2026-10-22T23:05:00"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/ds90ub940-q1",
"pages": 85,
"sha256": "7db79cad7ab6da57",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 65,
"described": 65,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds90ub940tnkdtq1.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
0.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
"checked": "2026-10-22",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds90ub940tnkdtq1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "23cac6afd5f60e8a8989ce16ff2640335a4a7ba5f1e3c462c6decc2a7d682980",
"checked": "2026-10-22",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "WQFN-64(9x9)",
"Category": "Interface",
"Pins": "65"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "7db79cad7ab6da57c06b0688a20cc9108ec743a4722632e3dbe5c93f7cc50b7f",
"rows": [
{
"name": "Supply voltage VDD33",
"symbol": "VDD33",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 4,
"conditions": "",
"source_page": 9,
"source": "datasheet"
},
{
"name": "Supply voltage VDD12",
"symbol": "VDD12",
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"min": -0.3,
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"conditions": "",
"source_page": 9,
"source": "datasheet"
},
{
"name": "Supply voltage VDDIO",
"symbol": "VDDIO",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
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