DS90UB924TRHSTQ1

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<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="9.6.2">
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<description></description>
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  <text x="0" y="4.475" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>
  <text x="0" y="-4.475" size="1.27" layer="27" align="top-center">&gt;VALUE</text>
</package>
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<symbols>
<symbol name="DS90UB924TRHSTQ1">
  <wire x1="-12.7" y1="33.02" x2="12.7" y2="33.02" width="0.254" layer="94"/>
  <wire x1="12.7" y1="33.02" x2="12.7" y2="-33.02" width="0.254" layer="94"/>
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  <pin name="I2S_DB/GPIO_REG5" x="-17.78" y="25.4" length="middle" direction="out"/>
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  <pin name="SCL" x="-17.78" y="20.32" length="middle" direction="io"/>
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  <pin name="I2S_CLK/GPIO_REG8" x="-17.78" y="12.7" length="middle" direction="out"/>
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  <pin name="I2S_WC/GPIO_REG7" x="-17.78" y="7.62" length="middle" direction="out"/>
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  <pin name="GPIO2/I2S_DD" x="17.78" y="-2.54" length="middle" direction="io" rot="R180"/>
  <pin name="GPIO3/I2S_DC" x="17.78" y="-5.08" length="middle" direction="io" rot="R180"/>
  <pin name="OSS_SEL" x="17.78" y="-7.62" length="middle" direction="in" rot="R180"/>
  <pin name="RES0" x="17.78" y="-10.16" length="middle" direction="pwr" rot="R180"/>
  <pin name="CAPL12" x="17.78" y="-12.7" length="middle" direction="pas" rot="R180"/>
  <pin name="LFMODE" x="17.78" y="-15.24" length="middle" direction="in" rot="R180"/>
  <pin name="VDD33_B" x="17.78" y="-17.78" length="middle" direction="pwr" rot="R180"/>
  <pin name="OEN" x="17.78" y="-20.32" length="middle" direction="in" rot="R180"/>
  <pin name="CAPLV12" x="17.78" y="-22.86" length="middle" direction="pas" rot="R180"/>
  <pin name="PASS" x="17.78" y="-25.4" length="middle" direction="out" rot="R180"/>
  <pin name="LOCK" x="17.78" y="-27.94" length="middle" direction="out" rot="R180"/>
  <pin name="MAPSEL" x="17.78" y="-30.48" length="middle" direction="in" rot="R180"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="DS90UB924TRHSTQ1" prefix="U">
  <description></description>
  <gates>
    <gate name="G$1" symbol="DS90UB924TRHSTQ1" x="0" y="0"/>
  </gates>
  <devices>
    <device name="" package="QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm">
      <connects>
        <connect gate="G$1" pin="PDB" pad="1"/>
        <connect gate="G$1" pin="CAPI2S" pad="2"/>
        <connect gate="G$1" pin="I2S_DB/GPIO_REG5" pad="3"/>
        <connect gate="G$1" pin="SDA" pad="4"/>
        <connect gate="G$1" pin="SCL" pad="5"/>
        <connect gate="G$1" pin="VDDIO" pad="6"/>
        <connect gate="G$1" pin="I2S_DA/GPIO_REG6" pad="7"/>
        <connect gate="G$1" pin="I2S_CLK/GPIO_REG8" pad="8"/>
        <connect gate="G$1" pin="BISTEN" pad="9"/>
        <connect gate="G$1" pin="I2S_WC/GPIO_REG7" pad="10"/>
        <connect gate="G$1" pin="MCLK" pad="11"/>
        <connect gate="G$1" pin="IDx" pad="12"/>
        <connect gate="G$1" pin="GPIO1/SDOUT" pad="13"/>
        <connect gate="G$1" pin="GPIO0/SWC" pad="14"/>
        <connect gate="G$1" pin="TxOUT3+" pad="15"/>
        <connect gate="G$1" pin="TxOUT3-" pad="16"/>
        <connect gate="G$1" pin="TxCLKOUT+" pad="17"/>
        <connect gate="G$1" pin="TxCLKOUT-" pad="18"/>
        <connect gate="G$1" pin="TxOUT2+" pad="19"/>
        <connect gate="G$1" pin="TxOUT2-" pad="20"/>
        <connect gate="G$1" pin="TxOUT1+" pad="21"/>
        <connect gate="G$1" pin="TxOUT1-" pad="22"/>
        <connect gate="G$1" pin="TxOUT0+" pad="23"/>
        <connect gate="G$1" pin="TxOUT0-" pad="24"/>
        <connect gate="G$1" pin="CAPLV25" pad="25"/>
        <connect gate="G$1" pin="EP" pad="49"/>
        <connect gate="G$1" pin="MODE_SEL" pad="48"/>
        <connect gate="G$1" pin="CAPP12" pad="47"/>
        <connect gate="G$1" pin="CAPR12" pad="46"/>
        <connect gate="G$1" pin="CMLOUTN" pad="45"/>
        <connect gate="G$1" pin="CMLOUTP" pad="44"/>
        <connect gate="G$1" pin="BISTC/INTB_IN" pad="43"/>
        <connect gate="G$1" pin="CMF" pad="42"/>
        <connect gate="G$1" pin="RIN-" pad="41"/>
        <connect gate="G$1" pin="RIN+" pad="40"/>
        <connect gate="G$1" pin="RES1" pad="39"/>
        <connect gate="G$1" pin="VDD33_A" pad="38"/>
        <connect gate="G$1" pin="GPIO2/I2S_DD" pad="37"/>
        <connect gate="G$1" pin="GPIO3/I2S_DC" pad="36"/>
        <connect gate="G$1" pin="OSS_SEL" pad="35"/>
        <connect gate="G$1" pin="RES0" pad="34"/>
        <connect gate="G$1" pin="CAPL12" pad="33"/>
        <connect gate="G$1" pin="LFMODE" pad="32"/>
        <connect gate="G$1" pin="VDD33_B" pad="31"/>
        <connect gate="G$1" pin="OEN" pad="30"/>
        <connect gate="G$1" pin="CAPLV12" pad="29"/>
        <connect gate="G$1" pin="PASS" pad="28"/>
        <connect gate="G$1" pin="LOCK" pad="27"/>
        <connect gate="G$1" pin="MAPSEL" pad="26"/>
      </connects>
      <technologies><technology name=""/></technologies>
    </device>
  </devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>