main
Ray Publish 0.1.0 3c38f38 8d ago
{
  "slug": "ds90ub914atrhsjq1",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Serializers / Deserializers, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "communication interface chip-uart-485-232",
    "ds90ub914atrhsjq1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ds90ub914atrhsjq1.kicad_sym",
    "ds90ub914atrhsjq1.kicad_mod",
    "ds90ub914atrhsjq1.glb",
    "ds90ub914atrhsjq1.step",
    "ds90ub914atrhsjq1.lbr",
    "docs/hero.png",
    "docs/ds90ub914atrhsjq1-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ds90ub914atrhsjq1-hero.glb",
    "ds90ub914atrhsjq1-hero.overlay.json",
    "ds90ub914atrhsjq1-etched.glb"
  ],
  "component": {
    "mpn": "DS90UB914ATRHSJQ1",
    "manufacturer": "Texas Instruments",
    "package": "WQFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "Communication Interface Chip/UART/485/232",
    "subcategory": "Serializers / Deserializers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ds90ub914a-q1",
    "parts": {
      "symbol": "ds90ub914atrhsjq1.kicad_sym",
      "footprint": "ds90ub914atrhsjq1.kicad_mod",
      "model_3d": "ds90ub914atrhsjq1-hero.glb",
      "model_3d_plain": "ds90ub914atrhsjq1-etched.glb",
      "model_3d_step": "ds90ub914atrhsjq1-etched.step",
      "model_3d_step_plain": "ds90ub914atrhsjq1.step",
      "lbr": "ds90ub914atrhsjq1.lbr"
    },
    "distributor_links": {
      "lcsc": "C882800",
      "digikey": "296-42651-2-ND",
      "mouser": "595-S90UB914ATRHSJQ1"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T09:04:38Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-42651-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-S90UB914ATRHSJQ1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "SDA",
        "type": "bidirectional",
        "description": "Open-drain data line of the I2C-compatible bidirectional control bus, requiring an external pullup resistor to VDDIO."
      },
      {
        "number": "2",
        "name": "SCL",
        "type": "bidirectional",
        "description": "Open-drain clock line of the I2C-compatible bidirectional control bus, requiring an external pullup resistor to VDDIO."
      },
      {
        "number": "3",
        "name": "VDDSSCG",
        "type": "power_in",
        "description": "SSCG PLL analog power supply, 1.8 V ±5%."
      },
      {
        "number": "4",
        "name": "OSS_SEL",
        "type": "input",
        "description": "Output Sleep State Select LVCMOS input with internal pulldown, used with OEN to set output states (Table 3)."
      },
      {
        "number": "5",
        "name": "OEN",
        "type": "input",
        "description": "Output Enable LVCMOS input with internal pulldown, used with OSS_SEL to set output states (Table 3)."
      },
      {
        "number": "6",
        "name": "BISTEN",
        "type": "input",
        "description": "BIST enable LVCMOS input with internal pulldown; high enables BIST mode, low disables it."
      },
      {
        "number": "7",
        "name": "VDDIO3",
        "type": "power_in",
        "description": "LVCMOS I/O buffer power for outputs and control inputs, 1.8 V ±5% or 3.3 V ±10%."
      },
      {
        "number": "8",
        "name": "PCLK",
        "type": "output",
        "description": "LVCMOS pixel clock output with strobe edge set by the RRFB register; active before LOCK in 12-bit low-frequency and 10-bit modes, and at the same time as LOCK in 12-bit high-frequency mode."
      },
      {
        "number": "9",
        "name": "VSYNC",
        "type": "output",
        "description": "LVCMOS vertical sync output, restricted to one transition per 10 PCLK cycles in 10-bit mode; leave open if unused."
      },
      {
        "number": "10",
        "name": "HSYNC",
        "type": "output",
        "description": "LVCMOS horizontal sync output, restricted to one transition per 10 PCLK cycles in 10-bit mode; leave open if unused."
      },
      {
        "number": "11",
        "name": "ROUT11",
        "type": "output",
        "description": "LVCMOS parallel data output bit 11, active only in 12-bit modes; leave unconnected in 10-bit mode or if unused."
      },
      {
        "number": "12",
        "name": "ROUT10",
        "type": "output",
        "description": "LVCMOS parallel data output bit 10, active only in 12-bit modes; leave unconnected in 10-bit mode or if unused."
      },
      {
        "number": "13",
        "name": "ROUT9",
        "type": "output",
        "description": "LVCMOS parallel data output bit 9, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "14",
        "name": "ROUT8",
        "type": "output",
        "description": "LVCMOS parallel data output bit 8, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "15",
        "name": "ROUT7",
        "type": "output",
        "description": "LVCMOS parallel data output bit 7, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "16",
        "name": "ROUT6",
        "type": "output",
        "description": "LVCMOS parallel data output bit 6, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "17",
        "name": "VDDD",
        "type": "power_in",
        "description": "Digital core power supply, 1.8 V ±5%."
      },
      {
        "number": "18",
        "name": "ROUT5",
        "type": "output",
        "description": "LVCMOS parallel data output bit 5, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "19",
        "name": "ROUT4",
        "type": "output",
        "description": "LVCMOS parallel data output bit 4, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "20",
        "name": "VDDIO2",
        "type": "power_in",
        "description": "LVCMOS I/O buffer power for outputs and control inputs, 1.8 V ±5% or 3.3 V ±10%."
      },
      {
        "number": "21",
        "name": "ROUT3",
        "type": "output",
        "description": "LVCMOS parallel data output bit 3, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "22",
        "name": "ROUT2",
        "type": "output",
        "description": "LVCMOS parallel data output bit 2, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "23",
        "name": "ROUT1",
        "type": "output",
        "description": "LVCMOS parallel data output bit 1, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "24",
        "name": "ROUT0",
        "type": "output",
        "description": "LVCMOS parallel data output bit 0, active in 10-bit and 12-bit modes; leave unconnected if unused."
      },
      {
        "number": "25",
        "name": "GPIO3",
        "type": "bidirectional",
        "description": "LVCMOS general-purpose I/O that can be an input for serializer GPO3 or an output following local register settings (output only with external oscillator); leave open if unused."
      },
      {
        "number": "26",
        "name": "GPIO2",
        "type": "bidirectional",
        "description": "LVCMOS general-purpose I/O that can be an input for serializer GPO2 or an output following local register settings (output only with external oscillator); leave open if unused."
      },
      {
        "number": "27",
        "name": "GPIO1",
        "type": "bidirectional",
        "description": "LVCMOS general-purpose I/O that can be an input for serializer GPO1 or an output following local register settings, also selects the BIST clock source; leave open if unused."
      },
      {
        "number": "28",
        "name": "GPIO0",
        "type": "bidirectional",
        "description": "LVCMOS general-purpose I/O that can be an input for serializer GPO0 or an output following local register settings, also selects the BIST clock source; leave open if unused."
      },
      {
        "number": "29",
        "name": "VDDIO1",
        "type": "power_in",
        "description": "LVCMOS I/O buffer power for outputs and control inputs, 1.8 V ±5% or 3.3 V ±10%."
      },
      {
        "number": "30",
        "name": "PDB",
        "type": "input",
        "description": "Power-down LVCMOS input with internal pulldown; high enables the deserializer, low powers it down and resets control registers to defaults."
      },
      {
        "number": "31",
        "name": "VDDCML1",
        "type": "power_in",
        "description": "CML and bidirectional control channel drive power supply, 1.8 V ±5%."
      },
      {
        "number": "32",
        "name": "RIN1+",
        "type": "bidirectional",
        "description": "Noninverting CML FPD-Link III input and bidirectional control channel, AC-coupled with a 0.1 µF capacitor; leave open if unused."
      },
      {
        "number": "33",
        "name": "RIN1-",
        "type": "bidirectional",
        "description": "Inverting CML FPD-Link III input and bidirectional control channel, AC-coupled with 0.1 µF (0.047 µF in series with 50 Ω to GND for single-ended coax); leave open if unused."
      },
      {
        "number": "34",
        "name": "IDx[1]",
        "type": "input",
        "description": "Analog device ID address select (IDx[1]) setting the I2C slave address, with resistor to ground and 10 kΩ pullup to the 1.8 V rail."
      },
      {
        "number": "35",
        "name": "IDx[0]",
        "type": "input",
        "description": "Analog device ID address select (IDx[0]) setting the I2C slave address, with resistor to ground and 10 kΩ pullup to the 1.8 V rail."
      },
      {
        "number": "36",
        "name": "VDDR",
        "type": "power_in",
        "description": "Rx analog power supply, 1.8 V ±5%."
      },
      {
        "number": "37",
        "name": "MODE",
        "type": "input",
        "description": "Analog mode select input selecting 12-bit low-frequency (25-50 MHz), 12-bit high-frequency (37.5-75 MHz) or 10-bit (50-100 MHz) operation via a resistor to ground and 10 kΩ pullup to 1.8 V."
      },
      {
        "number": "38",
        "name": "CMLOUTP",
        "type": "output",
        "description": "CML loop-through output; route to test point or leave open if unused."
      },
      {
        "number": "39",
        "name": "CMLOUTN",
        "type": "output",
        "description": "CML loop-through output; route to test point or leave open if unused."
      },
      {
        "number": "40",
        "name": "VDDCML0",
        "type": "power_in",
        "description": "CML and bidirectional control channel drive power supply, 1.8 V ±5%."
      },
      {
        "number": "41",
        "name": "RIN0+",
        "type": "bidirectional",
        "description": "Noninverting CML FPD-Link III input and bidirectional control channel, AC-coupled with a 0.1 µF capacitor; leave open if unused."
      },
      {
        "number": "42",
        "name": "RIN0-",
        "type": "bidirectional",
        "description": "Inverting CML FPD-Link III input and bidirectional control channel, AC-coupled with 0.1 µF (0.047 µF in series with 50 Ω to GND for single-ended coax); leave open if unused."
      },
      {
        "number": "43",
        "name": "RES",
        "type": "input",
        "description": "Reserved pin that must always be tied low."
      },
      {
        "number": "44",
        "name": "RES",
        "type": "input",
        "description": "Reserved pin that must always be tied low."
      },
      {
        "number": "45",
        "name": "VDDPLL",
        "type": "power_in",
        "description": "PLL analog power supply, 1.8 V ±5%."
      },
      {
        "number": "46",
        "name": "SEL",
        "type": "input",
        "description": "MUX select input with internal pulldown; low selects RIN0+/- and high selects RIN1+/- as the active channel."
      },
      {
        "number": "47",
        "name": "PASS",
        "type": "output",
        "description": "BIST pass output, high for error-free transmission and low when payload errors are detected; leave open if unused."
      },
      {
        "number": "48",
        "name": "LOCK",
        "type": "output",
        "description": "LOCK status output; high indicates the PLL is locked and outputs are active, low indicates unlocked with output states set by OSS_SEL."
      },
      {
        "number": "49",
        "name": "VSS",
        "type": "power_in",
        "description": "Exposed die attach pad that must be grounded, connected to the ground plane with at least 16 vias."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Text lists GPIO[3:2] as 25,26 and GPIO[1:0] as 27,28; assignment assumes descending order matching t; Table gives 'CMLOUTP/N 38,39'; assumed P=38 and N=39, but the figure text lists CMLOUTN before CMLOU; Table gives 'IDx[0:1] 35,34'; assigned IDx0=35 and IDx1=34 per that order.",
          "4/49 pins cited to the wrong page (name found elsewhere): ['20:VDDIO2@p8', '31:VDDCML1@p8', '39:CMLOUTN@p8', '49:VSS@p8']"
        ],
        "pages_sent": 31,
        "cost_usd": 0.3629,
        "at": "2026-10-23T09:04:20"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ds90ub914a-q1",
        "pages": 69,
        "sha256": "d4b97b56a1a2bbaf",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ds90ub914atrhsjq1.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ds90ub914atrhsjq1-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "94243166d0fa723f3708f9cca30644c1bec551f73b0dfe4887265f07b71f508e",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}