component
DS90UB635TRHBRQ1
Public Made by Adomby adom
Texas Instruments Serializers, Deserializers, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "ds90ub635trhbrq1",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Serializers, Deserializers, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"interface",
"ds90ub635trhbrq1",
"factory-2.0.0",
"extractor-text"
],
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"ds90ub635trhbrq1.step",
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"docs/ds90ub635trhbrq1-datasheet.pdf",
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"component": {
"mpn": "DS90UB635TRHBRQ1",
"manufacturer": "Texas Instruments",
"package": "QFN-32(5x5)",
"pin_count": 33,
"category": "Interface",
"subcategory": "Serializers, Deserializers",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603644058892193792",
"parts": {
"symbol": "ds90ub635trhbrq1.kicad_sym",
"footprint": "ds90ub635trhbrq1.kicad_mod",
"model_3d": "ds90ub635trhbrq1-hero.glb",
"model_3d_plain": "ds90ub635trhbrq1.glb",
"model_3d_step": "ds90ub635trhbrq1-etched.step",
"model_3d_step_plain": "ds90ub635trhbrq1.step",
"lbr": "ds90ub635trhbrq1.lbr"
},
"distributor_links": {
"lcsc": "C20345387",
"digikey": "296-DS90UB635TRHBRQ1TR-ND",
"mouser": "595-DS90UB635TRHBRQ1"
},
"distributor_check": {
"checked_at": "2026-10-09T00:01:19Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-DS90UB635TRHBRQ1TR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-DS90UB635TRHBRQ1",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "CSI_D1P",
"type": "input",
"description": "DPHY CSI-2 data input; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnect, and it may be left floating if unused."
},
{
"number": "2",
"name": "CSI_D1N",
"type": "input",
"description": "DPHY CSI-2 data input; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnect, and it may be left floating if unused."
},
{
"number": "3",
"name": "CSI_D0P",
"type": "input",
"description": "DPHY CSI-2 data input; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnect, and it may be left floating if unused."
},
{
"number": "4",
"name": "CSI_D0N",
"type": "input",
"description": "DPHY CSI-2 data input; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnect, and it may be left floating if unused."
},
{
"number": "5",
"name": "CSI_CLKP",
"type": "input",
"description": "DPHY CSI-2 clock input; connect to a CSI-2 clock source with matched 100-Ω (±5%) impedance interconnect."
},
{
"number": "6",
"name": "CSI_CLKN",
"type": "input",
"description": "DPHY CSI-2 clock input; connect to a CSI-2 clock source with matched 100-Ω (±5%) impedance interconnect."
},
{
"number": "7",
"name": "RES0",
"type": "input",
"description": "Reserved pin; connect to GND."
},
{
"number": "8",
"name": "PDB",
"type": "input",
"description": "Power-down inverted input with internal 1-MΩ pulldown; PDB = 1.8 V enables the device and PDB = 0 powers it down, and the PDB input is not 3.3-V tolerant."
},
{
"number": "9",
"name": "LPF1",
"type": "passive",
"description": "Loop filter 1; connect a 0.022-µF capacitor to VDDPLL (pin 11) with the loop kept as small as possible."
},
{
"number": "10",
"name": "VDDPLL_CAP",
"type": "passive",
"description": "Internal analog regulator output for decoupling; typically 10-µF, 0.1-µF, and 0.01-µF capacitors to GND, and must not be connected to an external supply rail."
},
{
"number": "11",
"name": "VDDPLL",
"type": "power_in",
"description": "1.8-V (±5%) analog power supply pin; typically bypassed with 1-µF and 0.01-µF capacitors to GND."
},
{
"number": "12",
"name": "LPF2",
"type": "passive",
"description": "Loop filter 2; connect a 0.1-µF capacitor from this pin to GND."
},
{
"number": "13",
"name": "DOUT-",
"type": "bidirectional",
"description": "FPD-Link III input/output pin that must be AC-coupled; the FPD-Link III output voltage is limited to -0.3 V to 1.21 V."
},
{
"number": "14",
"name": "DOUT+",
"type": "bidirectional",
"description": "FPD-Link III input/output pin that must be AC-coupled; the FPD-Link III output voltage is limited to -0.3 V to 1.21 V."
},
{
"number": "15",
"name": "VDDDRV_CAP",
"type": "passive",
"description": "Internal analog regulator output for decoupling; typically 10-µF, 0.1-µF, and 0.01-µF capacitors to GND, and must not be connected to an external supply rail."
},
{
"number": "16",
"name": "VDDDRV",
"type": "power_in",
"description": "1.8-V (±5%) analog power supply pin; typically bypassed with 1-µF and 0.01-µF capacitors to GND."
},
{
"number": "17",
"name": "GPIO_0",
"type": "bidirectional",
"description": "General-purpose input/output that defaults to an input with a 300-kΩ (typical) internal pulldown at power-up; may be left floating, but TI recommends setting GPIOx_INPUT_EN to 0 to disable it."
},
{
"number": "18",
"name": "GPIO_1",
"type": "bidirectional",
"description": "General-purpose input/output that defaults to an input with a 300-kΩ (typical) internal pulldown at power-up; may be left floating, but TI recommends setting GPIOx_INPUT_EN to 0 to disable it."
},
{
"number": "19",
"name": "CLK_OUT/IDX",
"type": "bidirectional",
"description": "IDX strap input sets the I2C pull-up voltage and device address when PDB goes HIGH and then becomes CLK_OUT; if CLK_OUT is used the minimum resistance on the pin is 35 kΩ, and if unused it may be tied to GND."
},
{
"number": "20",
"name": "CLKIN",
"type": "input",
"description": "Reference clock input; connect to a local clock source in non-sync external clock mode, and it may be left open in other clocking modes."
},
{
"number": "21",
"name": "MODE",
"type": "input",
"description": "Mode-select strap input sampled when PDB transitions LOW to HIGH to set the default operating mode, typically set with a voltage divider between VDD18 and GND."
},
{
"number": "22",
"name": "RES1",
"type": "unconnected",
"description": "Reserved pin; do not connect (leave floating)."
},
{
"number": "23",
"name": "I2C_SDA",
"type": "bidirectional",
"description": "Open-drain I2C data pin, typically pulled up by 470-Ω to 4.7-kΩ resistors to a 1.8-V or 3.3-V rail depending on the IDX setting; absolute maximum open-drain voltage is -0.3 V to 3.96 V."
},
{
"number": "24",
"name": "I2C_SCL",
"type": "bidirectional",
"description": "Open-drain I2C clock pin, typically pulled up by 470-Ω to 4.7-kΩ resistors to a 1.8-V or 3.3-V rail depending on the IDX setting; absolute maximum open-drain voltage is -0.3 V to 3.96 V."
},
{
"number": "25",
"name": "VDDD",
"type": "power_in",
"description": "1.8-V (±5%) power supply pin; typically bypassed with 1-µF and 0.01-µF capacitors to GND."
},
{
"number": "26",
"name": "VDDD_CAP",
"type": "passive",
"description": "Internal analog regulator output for decoupling; typically 10-µF, 0.1-µF, and 0.01-µF capacitors to GND, and must not be connected to an external supply rail."
},
{
"number": "27",
"name": "GPIO_2",
"type": "bidirectional",
"description": "General-purpose input/output that defaults to an input with a 300-kΩ (typical) internal pulldown at power-up; may be left floating, but TI recommends setting GPIOx_INPUT_EN to 0 to disable it."
},
{
"number": "28",
"name": "GPIO_3",
"type": "bidirectional",
"description": "General-purpose input/output that defaults to an input with a 300-kΩ (typical) internal pulldown at power-up; may be left floating, but TI recommends setting GPIOx_INPUT_EN to 0 to disable it."
},
{
"number": "29",
"name": "CSI_D3P",
"type": "input",
"description": "DPHY CSI-2 data input; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnect, and it may be left floating if unused."
},
{
"number": "30",
"name": "CSI_D3N",
"type": "input",
"description": "DPHY CSI-2 data input; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnect, and it may be left floating if unused."
},
{
"number": "31",
"name": "CSI_D2P",
"type": "input",
"description": "DPHY CSI-2 data input; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnect, and it may be left floating if unused."
},
{
"number": "32",
"name": "CSI_D2N",
"type": "input",
"description": "DPHY CSI-2 data input; connect to a CSI-2 data source with matched 100-Ω (±5%) impedance interconnect, and it may be left floating if unused."
},
{
"number": "33",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The DAP (exposed thermal pad, typed GND / power_in in the datasheet) is not a numbered pin on the pa; Table 5-1 lists RES1 with I/O type 'I', but the description says do not connect (leave floating), so; LPF1/LPF2 (loop filters) and the VDD*_CAP regulator decoupling pins are not KiCad types the datashee",
"exposed pad 33 added from the footprint"
],
"pages_sent": 16,
"cost_usd": 0.1195,
"at": "2026-10-09T00:00:26"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603644058892193792",
"pages": 83,
"sha256": "504de8fca9d823ef",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds90ub635trhbrq1.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
0.875
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-10-09",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds90ub635trhbrq1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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5.0,
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"sha256": "df4edfe1894957f676128404d35ea4307c2762b9786d27746297881e1d40705b",
"checked": "2026-10-09",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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}
}