component
DS8561-36S3
Public Made by Adomby adom
DSTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "ds8561-36s3",
"version": "0.1.0",
"type": "component",
"description": "DSTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"ds8561-36s3",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ds8561-36s3.kicad_sym",
"ds8561-36s3.kicad_mod",
"ds8561-36s3.glb",
"ds8561-36s3.step",
"ds8561-36s3.lbr",
"docs/hero.png",
"docs/ds8561-36s3-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ds8561-36s3-hero.glb",
"ds8561-36s3-hero.overlay.json",
"ds8561-36s3-etched.glb"
],
"component": {
"mpn": "DS8561-36S3",
"manufacturer": "DSTECH",
"package": "SOT23-3",
"pin_count": 3,
"category": "Power Management (PMIC)",
"subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904224777510912",
"parts": {
"symbol": "ds8561-36s3.kicad_sym",
"footprint": "ds8561-36s3.kicad_mod",
"model_3d": "ds8561-36s3-hero.glb",
"model_3d_plain": "ds8561-36s3-etched.glb",
"model_3d_step": "ds8561-36s3-etched.step",
"model_3d_step_plain": "ds8561-36s3.step",
"lbr": "ds8561-36s3.lbr"
},
"distributor_links": {
"lcsc": "C5795634"
},
"distributor_check": {
"checked_at": "2026-10-18T19:15:29Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "GND",
"type": "power_in",
"description": "Ground pin; the input and output capacitor ground connections must be returned to this pin using short, wide traces."
},
{
"number": "2",
"name": "VOUT",
"type": "power_out",
"description": "Regulated output voltage port; an output capacitor of 1uF to 22uF with ESR above 1mΩ should be placed close to VOUT and GND."
},
{
"number": "3",
"name": "VIN",
"type": "power_in",
"description": "Power input port with a 1.2V to 5.5V input range; an input capacitor of at least 1uF should be placed close to VIN and GND."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pin table on page 3 merges the SSOT-23 and SOT-23-3 columns into one pin-number column. The SOT-; The package pin diagram on page 1 is labeled 'SSOT-23&SOT-23-3' and its text layout is ambiguous (VI; The MPN suffix '36' is not listed in the datasheet's output-voltage code table (listed codes: 12, 25"
],
"pages_sent": 19,
"cost_usd": 0.0499,
"at": "2026-10-18T19:15:15"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904224777510912",
"pages": 19,
"sha256": "b28c6b5e18533c57",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 3,
"described": 3,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
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"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "16964b14f93e6c778288a0c110b35f670fab733109c26f0da7dfc07cc3350040",
"checked": "2026-10-18",
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},
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"sha256": "2c95ca25384ddea43356d2ea3d0152c8d96a99bfe4a0a1de9b8905caf2c28073",
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}