DS40MB200SQ

{
  "schema_version": 1,
  "type": "component",
  "slug": "ds40mb200sq",
  "title": "DS40MB200SQ",
  "brief": "Texas Instruments Signal Buffers, Repeaters, Splitters, WQFN-48-EP(7x7). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "interface",
    "ds40mb200sq"
  ],
  "component": {
    "mpn": "DS40MB200SQ",
    "manufacturer": "Texas Instruments",
    "package": "WQFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "Interface",
    "subcategory": "Signal Buffers, Repeaters, Splitters",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ds40mb200",
    "parts": {
      "symbol": "ds40mb200sq.kicad_sym",
      "footprint": "ds40mb200sq.kicad_mod",
      "model_3d": "ds40mb200sq-etched.glb",
      "model_3d_plain": "ds40mb200sq.glb",
      "model_3d_step": "ds40mb200sq-etched.step",
      "model_3d_step_plain": "ds40mb200sq.step",
      "lbr": "ds40mb200sq.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "PREL_1",
        "type": "input",
        "description": "3.3V LVCMOS pre-emphasis level select bit 1 for line-side drivers (LO_0+/- and LO_1+/-). Internally pulled up. Combined with PREL_0 to choose one of four pre-emphasis levels (see PRE_L emphasis table)."
      },
      {
        "number": "2",
        "name": "VCC",
        "type": "power_in",
        "description": "3.3V +/-5% supply. Each VCC pin should connect to the VCC plane through a low-inductance via close to the pin; TI recommends a 0.01uF and 0.1uF X7R 0402 bypass capacitor between each VCC pin and ground."
      },
      {
        "number": "3",
        "name": "SOB_0-",
        "type": "output",
        "description": "Switch-side B multiplexer 0 inverting CML differential output. Has an internal 50 ohm resistor to VCC. Must be AC-coupled."
      },
      {
        "number": "4",
        "name": "SOB_0+",
        "type": "output",
        "description": "Switch-side B multiplexer 0 non-inverting CML differential output. Has an internal 50 ohm resistor to VCC. Must be AC-coupled."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "Reference ground. Each GND pin must connect to the ground plane through a low-inductance path (typically a via near the pin)."
      },
      {
        "number": "6",
        "name": "LI_0+",
        "type": "input",
        "description": "Line-side port 0 non-inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled (see Figure 7-1)."
      },
      {
        "number": "7",
        "name": "LI_0-",
        "type": "input",
        "description": "Line-side port 0 inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "3.3V +/-5% supply. Bypass to ground with 0.01uF and 0.1uF X7R 0402 capacitors close to the pin."
      },
      {
        "number": "9",
        "name": "LO_1+",
        "type": "output",
        "description": "Line-side port 1 non-inverting CML differential output. Has an internal 50 ohm resistor to VCC. Must be AC-coupled."
      },
      {
        "number": "10",
        "name": "LO_1-",
        "type": "output",
        "description": "Line-side port 1 inverting CML differential output. Has an internal 50 ohm resistor to VCC. Must be AC-coupled."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Reference ground. Low-inductance via to the ground plane recommended."
      },
      {
        "number": "12",
        "name": "PREL_0",
        "type": "input",
        "description": "3.3V LVCMOS pre-emphasis level select bit 0 for line-side drivers (LO_0+/- and LO_1+/-). Internally pulled up. Combined with PREL_1 to select one of four pre-emphasis levels."
      },
      {
        "number": "13",
        "name": "MUX_S1",
        "type": "input",
        "description": "3.3V LVCMOS multiplexer 1 select: logic high selects switch B for MUX 1. Internally pulled up. Default state of MUX 1 is switch A."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "3.3V +/-5% supply. Bypass with 0.01uF and 0.1uF X7R 0402 close to the pin."
      },
      {
        "number": "15",
        "name": "SIA_1-",
        "type": "input",
        "description": "Switch-side A multiplexer 1 inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "16",
        "name": "SIA_1+",
        "type": "input",
        "description": "Switch-side A multiplexer 1 non-inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "17",
        "name": "GND",
        "type": "power_in",
        "description": "Reference ground. Low-inductance via to the ground plane recommended."
      },
      {
        "number": "18",
        "name": "SIB_1-",
        "type": "input",
        "description": "Switch-side B multiplexer 1 inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "19",
        "name": "SIB_1+",
        "type": "input",
        "description": "Switch-side B multiplexer 1 non-inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "3.3V +/-5% supply. Bypass with 0.01uF and 0.1uF X7R 0402 close to the pin."
      },
      {
        "number": "21",
        "name": "SOA_1-",
        "type": "output",
        "description": "Switch-side A multiplexer 1 inverting CML differential output. Has an internal 50 ohm resistor to VCC."
      },
      {
        "number": "22",
        "name": "SOA_1+",
        "type": "output",
        "description": "Switch-side A multiplexer 1 non-inverting CML differential output. Has an internal 50 ohm resistor to VCC."
      },
      {
        "number": "23",
        "name": "LB1A",
        "type": "input",
        "description": "3.3V LVCMOS. A logic low at LB1A enables the internal loopback path from SIA_1+/- back to SOA_1+/-. Internally pulled up."
      },
      {
        "number": "24",
        "name": "LB1B",
        "type": "input",
        "description": "3.3V LVCMOS. A logic low at LB1B enables the internal loopback path from SIB_1+/- back to SOA_1+/-. Internally pulled up."
      },
      {
        "number": "25",
        "name": "PRES_1",
        "type": "input",
        "description": "3.3V LVCMOS pre-emphasis level select bit 1 for switch-side drivers (SOA_0+/-, SOB_0+/-, SOA_1+/-, SOB_1+/-). Internally pulled up. Combined with PRES_0 to choose one of four pre-emphasis levels."
      },
      {
        "number": "26",
        "name": "RSV",
        "type": "input",
        "description": "Reserved pin used for factory test. May be left open, connected to GND, or tied to GND through an external pull-down resistor."
      },
      {
        "number": "27",
        "name": "SOB_1-",
        "type": "output",
        "description": "Switch-side B multiplexer 1 inverting CML differential output. Has an internal 50 ohm resistor to VCC."
      },
      {
        "number": "28",
        "name": "SOB_1+",
        "type": "output",
        "description": "Switch-side B multiplexer 1 non-inverting CML differential output. Has an internal 50 ohm resistor to VCC."
      },
      {
        "number": "29",
        "name": "VCC",
        "type": "power_in",
        "description": "3.3V +/-5% supply. Bypass with 0.01uF and 0.1uF X7R 0402 close to the pin."
      },
      {
        "number": "30",
        "name": "LI_1+",
        "type": "input",
        "description": "Line-side port 1 non-inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "31",
        "name": "LI_1-",
        "type": "input",
        "description": "Line-side port 1 inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "32",
        "name": "GND",
        "type": "power_in",
        "description": "Reference ground. Low-inductance via to the ground plane recommended."
      },
      {
        "number": "33",
        "name": "LO_0+",
        "type": "output",
        "description": "Line-side port 0 non-inverting CML differential output. Has an internal 50 ohm resistor to VCC. Must be AC-coupled."
      },
      {
        "number": "34",
        "name": "LO_0-",
        "type": "output",
        "description": "Line-side port 0 inverting CML differential output. Has an internal 50 ohm resistor to VCC. Must be AC-coupled."
      },
      {
        "number": "35",
        "name": "VCC",
        "type": "power_in",
        "description": "3.3V +/-5% supply. Bypass with 0.01uF and 0.1uF X7R 0402 close to the pin."
      },
      {
        "number": "36",
        "name": "PRES_0",
        "type": "input",
        "description": "3.3V LVCMOS pre-emphasis level select bit 0 for switch-side drivers (SOA_0+/-, SOB_0+/-, SOA_1+/-, SOB_1+/-). Internally pulled up. Combined with PRES_1 to select one of four pre-emphasis levels."
      },
      {
        "number": "37",
        "name": "MUX_S0",
        "type": "input",
        "description": "3.3V LVCMOS multiplexer 0 select: logic high selects switch B for MUX 0. Internally pulled up. Default state of MUX 0 is switch A."
      },
      {
        "number": "38",
        "name": "VCC",
        "type": "power_in",
        "description": "3.3V +/-5% supply. Bypass with 0.01uF and 0.1uF X7R 0402 close to the pin."
      },
      {
        "number": "39",
        "name": "SIA_0-",
        "type": "input",
        "description": "Switch-side A multiplexer 0 inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "40",
        "name": "SIA_0+",
        "type": "input",
        "description": "Switch-side A multiplexer 0 non-inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "41",
        "name": "GND",
        "type": "power_in",
        "description": "Reference ground. Low-inductance via to the ground plane recommended."
      },
      {
        "number": "42",
        "name": "SIB_0-",
        "type": "input",
        "description": "Switch-side B multiplexer 0 inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "43",
        "name": "SIB_0+",
        "type": "input",
        "description": "Switch-side B multiplexer 0 non-inverting CML differential input. Has an internal 50 ohm resistor to an internal reference voltage. Must be AC-coupled."
      },
      {
        "number": "44",
        "name": "VCC",
        "type": "power_in",
        "description": "3.3V +/-5% supply. Bypass with 0.01uF and 0.1uF X7R 0402 close to the pin."
      },
      {
        "number": "45",
        "name": "SOA_0-",
        "type": "output",
        "description": "Switch-side A multiplexer 0 inverting CML differential output. Has an internal 50 ohm resistor to VCC."
      },
      {
        "number": "46",
        "name": "SOA_0+",
        "type": "output",
        "description": "Switch-side A multiplexer 0 non-inverting CML differential output. Has an internal 50 ohm resistor to VCC."
      },
      {
        "number": "47",
        "name": "LB0A",
        "type": "input",
        "description": "3.3V LVCMOS. A logic low at LB0A enables the internal loopback path from SIA_0+/- back to SOA_0+/-. Internally pulled up."
      },
      {
        "number": "48",
        "name": "LB0B",
        "type": "input",
        "description": "3.3V LVCMOS. A logic low at LB0B enables the internal loopback path from SIB_0+/- back to SOA_0+/-. Internally pulled up."
      },
      {
        "number": "DAP",
        "name": "GND",
        "type": "power_in",
        "description": "Die attach pad (exposed metal pad on the bottom, center of WQFN-48). Must be connected to the GND plane through at least four vias to lower ground impedance and improve thermal performance."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ds40mb200",
        "pages": 25,
        "sha256": "a347064cd35ec67a",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
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  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "WQFN-48-EP(7x7)",
      "Category": "Interface",
      "Pins": "49"
    }
  },
  "variants": [
    {
      "mpn": "DS40MB200SQ",
      "kind": "packaging"
    },
    {
      "mpn": "DS40MB200SQE",
      "kind": "packaging"
    },
    {
      "mpn": "DS40MB200SQX",
      "kind": "packaging"
    }
  ],
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    "info"
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  "discovery_triggers": [
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  "discovery_pitch": "DS40MB200SQ (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
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    "ds40mb200sq.step",
    "ds40mb200sq.lbr",
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    "docs/ds40mb200sq-datasheet.pdf",
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  "visibility": {
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  "updated_at": "2026-09-24T20:06:33.678Z"
}