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DS25MB100TSQX

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Texas Instruments Signal Buffers, Repeaters, Splitters, QFN-36-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DS25MB100TSQX

Texas Instruments · Signal Buffers, Repeaters, Splitters · QFN-36-EP(6x6)

DS25MB100TSQX from Texas Instruments, in a QFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DES1 input Selects the output pre-emphasis of the switch-side drivers (OUT0±, OUT1±) together with DES0, and is internally pulled high.
2 GND power_in Ground reference that must be connected to the ground plane through a low-inductance path, typically with a via placed as close as possible to the pin.
3 OUT0+ output Non-inverting switch-side differential output 0, internally terminated with 50 Ω to VCC, and must be AC coupled.
4 OUT0- output Inverting switch-side differential output 0, internally terminated with 50 Ω to VCC, and must be AC coupled.
5 VCC power_in Supply pin for 3.3 V ±5%, to be bypassed to ground plane with a 0.01-µF or 0.1-µF X7R size-0402 capacitor.
6 IN0+ input Non-inverting switch-side mux differential input 0, internally terminated with 50 Ω to an internal reference voltage, and must be AC coupled.
7 IN0- input Inverting switch-side mux differential input 0, internally terminated with 50 Ω to an internal reference voltage, and must be AC coupled.
8 GND power_in Ground reference that must be connected to the ground plane through a low-inductance path, typically with a via placed as close as possible to the pin.
9 GND power_in Ground reference that must be connected to the ground plane through a low-inductance path, typically with a via placed as close as possible to the pin.
10 DES0 input Selects the output pre-emphasis of the switch-side drivers (OUT0±, OUT1±) together with DES1, and is internally pulled high.
11 EQL input A logic low enables the line-side input equalizer, with a default of EQ disabled, and the pin is internally pulled high.
12 GND power_in Ground reference that must be connected to the ground plane through a low-inductance path, typically with a via placed as close as possible to the pin.
13 VCC power_in Supply pin for 3.3 V ±5%, to be bypassed to ground plane with a 0.01-µF or 0.1-µF X7R size-0402 capacitor.
14 GND power_in Ground reference that must be connected to the ground plane through a low-inductance path, typically with a via placed as close as possible to the pin.
15 VCC power_in Supply pin for 3.3 V ±5%, to be bypassed to ground plane with a 0.01-µF or 0.1-µF X7R size-0402 capacitor.
16 GND power_in Ground reference that must be connected to the ground plane through a low-inductance path, typically with a via placed as close as possible to the pin.
17 RSV input Reserved for factory testing; it may be left open, tied to GND, or tied to GND through an external pulldown resistor.
18 DEL0 input Selects the output pre-emphasis of the line-side drivers (OUT±) together with DEL1, and is internally pulled high.
19 MUX input A logic low selects IN1±; the pin is internally pulled high and the default state selects IN0±.
20 GND power_in Ground reference that must be connected to the ground plane through a low-inductance path, typically with a via placed as close as possible to the pin.
21 OUT1- output Inverting switch-side differential output 1, internally terminated with 50 Ω to VCC, and must be AC coupled.
22 OUT1+ output Non-inverting switch-side differential output 1, internally terminated with 50 Ω to VCC, and must be AC coupled.
23 VCC power_in Supply pin for 3.3 V ±5%, to be bypassed to ground plane with a 0.01-µF or 0.1-µF X7R size-0402 capacitor.
24 IN1- input Inverting switch-side mux differential input 1, internally terminated with 50 Ω to an internal reference voltage, and must be AC coupled.
25 IN1+ input Non-inverting switch-side mux differential input 1, internally terminated with 50 Ω to an internal reference voltage, and must be AC coupled.
26 LB1 input A logic low enables the internal loopback path from IN1± to OUT1±, and the pin is internally pulled high.
27 DEL1 input Selects the output pre-emphasis of the line-side drivers (OUT±) together with DEL0, and is internally pulled high.
28 LB0 input A logic low enables the internal loopback path from IN0± to OUT0±, and the pin is internally pulled high.
29 GND power_in Ground reference that must be connected to the ground plane through a low-inductance path, typically with a via placed as close as possible to the pin.
30 OUT+ output Non-inverting line-side differential output, internally terminated with 50 Ω to VCC, and must be AC coupled.
31 OUT− output Inverting line-side differential output, internally terminated with 50 Ω to VCC, and must be AC coupled.
32 VCC power_in Supply pin for 3.3 V ±5%, to be bypassed to ground plane with a 0.01-µF or 0.1-µF X7R size-0402 capacitor.
33 IN+ input Non-inverting line-side differential input, internally terminated with 50 Ω to an internal reference voltage, and must be AC coupled.
34 IN− input Inverting line-side differential input, internally terminated with 50 Ω to an internal reference voltage, and must be AC coupled.
35 GND power_in Ground reference that must be connected to the ground plane through a low-inductance path, typically with a via placed as close as possible to the pin.
36 EQS input A logic low enables the switch-side input equalizer, with a default of EQ disabled, and the pin is internally pulled high.
37 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-36-EP(6x6)
Category Interface
Pins 37

CAD (KiCad official)

  • Symbol: DS25MB100TSQX
  • Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • 3D model: QFN-36-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: ds25mb100tsqx-etched.step / ds25mb100tsqx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds25mb100tsqx.step / ds25mb100tsqx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 1cadf90de3d08519, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF