component
DS25CP104ATSQX
Public Made by Adomby adom
Texas Instruments Signal Switches, Multiplexers, Decoders, WQFN-40(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "ds25cp104atsqx",
"title": "DS25CP104ATSQX",
"brief": "Texas Instruments Signal Switches, Multiplexers, Decoders, WQFN-40(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"logic",
"ds25cp104atsqx",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "DS25CP104ATSQX",
"manufacturer": "Texas Instruments",
"package": "WQFN-40(6x6)",
"pin_count": 41,
"category": "Logic",
"subcategory": "Signal Switches, Multiplexers, Decoders",
"datasheet": "https://www.ti.com/cn/lit/gpn/ds25cp104a",
"parts": {
"symbol": "ds25cp104atsqx.kicad_sym",
"footprint": "ds25cp104atsqx.kicad_mod",
"model_3d": "ds25cp104atsqx-hero.glb",
"model_3d_plain": "ds25cp104atsqx.glb",
"model_3d_step": "ds25cp104atsqx-etched.step",
"model_3d_step_plain": "ds25cp104atsqx.step",
"lbr": "ds25cp104atsqx.lbr"
},
"distributor_links": {
"lcsc": "C2674983"
},
"distributor_check": {
"checked_at": "2026-10-08T03:05:32Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "IN0+",
"type": "input",
"description": "Non-inverting high-speed LVDS input of channel 0, with an internal 100 Ω differential termination on the DS25CP104A (eliminated on the DS25CP114)."
},
{
"number": "2",
"name": "IN0-",
"type": "input",
"description": "Inverting high-speed LVDS input of channel 0, with an internal 100 Ω differential termination on the DS25CP104A (eliminated on the DS25CP114)."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VCC is specified at 3.0 V to 3.6 V (3.3 V typical)."
},
{
"number": "4",
"name": "IN1+",
"type": "input",
"description": "Non-inverting high-speed LVDS input of channel 1, with an internal 100 Ω differential termination on the DS25CP104A (eliminated on the DS25CP114)."
},
{
"number": "5",
"name": "IN1-",
"type": "input",
"description": "Inverting high-speed LVDS input of channel 1, with an internal 100 Ω differential termination on the DS25CP104A (eliminated on the DS25CP114)."
},
{
"number": "6",
"name": "IN2+",
"type": "input",
"description": "Non-inverting high-speed LVDS input of channel 2, with an internal 100 Ω differential termination on the DS25CP104A (eliminated on the DS25CP114)."
},
{
"number": "7",
"name": "IN2-",
"type": "input",
"description": "Inverting high-speed LVDS input of channel 2, with an internal 100 Ω differential termination on the DS25CP104A (eliminated on the DS25CP114)."
},
{
"number": "8",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VCC is specified at 3.0 V to 3.6 V (3.3 V typical)."
},
{
"number": "9",
"name": "IN3+",
"type": "input",
"description": "Non-inverting high-speed LVDS input of channel 3, with an internal 100 Ω differential termination on the DS25CP104A (eliminated on the DS25CP114)."
},
{
"number": "10",
"name": "IN3-",
"type": "input",
"description": "Inverting high-speed LVDS input of channel 3, with an internal 100 Ω differential termination on the DS25CP104A (eliminated on the DS25CP114)."
},
{
"number": "11",
"name": "EQ2",
"type": "input",
"description": "Receive equalization level select pin for channel 2 (LVCMOS); functional regardless of the EN_smb state."
},
{
"number": "12",
"name": "EQ3",
"type": "input",
"description": "Receive equalization level select pin for channel 3 (LVCMOS); functional regardless of the EN_smb state."
},
{
"number": "13",
"name": "S30",
"type": "input",
"description": "With EN_smb low, selects which LVDS input is routed to OUT3; non-functional in SMBus mode and should be tied high or low."
},
{
"number": "14",
"name": "S31",
"type": "input",
"description": "With EN_smb low, selects which LVDS input is routed to OUT3; non-functional in SMBus mode and should be tied high or low."
},
{
"number": "15",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VCC is specified at 3.0 V to 3.6 V (3.3 V typical)."
},
{
"number": "16",
"name": "GND",
"type": "power_in",
"description": "Power ground pin; connect to the board ground plane."
},
{
"number": "17",
"name": "EN_smb",
"type": "input",
"description": "SMBus enable pin with an internal 20 kΩ pulldown; setting it high selects SMBus mode, and all SMBus registers reset when this pin is toggled."
},
{
"number": "18",
"name": "PE3",
"type": "input",
"description": "Transmit pre-emphasis level select pin for output channel 3 (LVCMOS); functional regardless of the EN_smb state."
},
{
"number": "19",
"name": "PE2",
"type": "input",
"description": "Transmit pre-emphasis level select pin for output channel 2 (LVCMOS); functional regardless of the EN_smb state."
},
{
"number": "20",
"name": "PE1",
"type": "input",
"description": "Transmit pre-emphasis level select pin for output channel 1 (LVCMOS); functional regardless of the EN_smb state."
},
{
"number": "21",
"name": "OUT3-",
"type": "output",
"description": "Inverting LVDS output of channel 3 with an internal 100 Ω termination."
},
{
"number": "22",
"name": "OUT3+",
"type": "output",
"description": "Non-inverting LVDS output of channel 3 with an internal 100 Ω termination."
},
{
"number": "23",
"name": "OUT2-",
"type": "output",
"description": "Inverting LVDS output of channel 2 with an internal 100 Ω termination."
},
{
"number": "24",
"name": "OUT2+",
"type": "output",
"description": "Non-inverting LVDS output of channel 2 with an internal 100 Ω termination."
},
{
"number": "25",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VCC is specified at 3.0 V to 3.6 V (3.3 V typical)."
},
{
"number": "26",
"name": "OUT1-",
"type": "output",
"description": "Inverting LVDS output of channel 1 with an internal 100 Ω termination."
},
{
"number": "27",
"name": "OUT1+",
"type": "output",
"description": "Non-inverting LVDS output of channel 1 with an internal 100 Ω termination."
},
{
"number": "28",
"name": "OUT0-",
"type": "output",
"description": "Inverting LVDS output of channel 0 with an internal 100 Ω termination."
},
{
"number": "29",
"name": "OUT0+",
"type": "output",
"description": "Non-inverting LVDS output of channel 0 with an internal 100 Ω termination."
},
{
"number": "30",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VCC is specified at 3.0 V to 3.6 V (3.3 V typical)."
},
{
"number": "31",
"name": "PE0",
"type": "input",
"description": "Transmit pre-emphasis level select pin for output channel 0 (LVCMOS); functional regardless of the EN_smb state."
},
{
"number": "32",
"name": "S21/ADDR3",
"type": "input",
"description": "With EN_smb low, selects which LVDS input is routed to OUT2; in SMBus mode it is the user-set SMBus slave address input ADDR3."
},
{
"number": "33",
"name": "S20/ADDR2",
"type": "input",
"description": "With EN_smb low, selects which LVDS input is routed to OUT2; in SMBus mode it is the user-set SMBus slave address input ADDR2."
},
{
"number": "34",
"name": "S11/ADDR1",
"type": "input",
"description": "With EN_smb low, selects which LVDS input is routed to OUT1; in SMBus mode it is the user-set SMBus slave address input ADDR1."
},
{
"number": "35",
"name": "S10/ADDR0",
"type": "input",
"description": "With EN_smb low, selects which LVDS input is routed to OUT1; in SMBus mode it is the user-set SMBus slave address input ADDR0."
},
{
"number": "36",
"name": "S01/SDA",
"type": "bidirectional",
"description": "In SMBus mode (EN_smb high) this is the SMBus data pin (SDA), and with EN_smb low it is an LVCMOS input-select pin for OUT0."
},
{
"number": "37",
"name": "S00/SCL",
"type": "input",
"description": "In SMBus mode (EN_smb high) this is the SMBus clock input (SCL), and with EN_smb low it selects which LVDS input is routed to OUT0."
},
{
"number": "38",
"name": "PWDN",
"type": "input",
"description": "With EN_smb low, a low level puts the device in power-down mode; in SMBus mode the device powers up when PWDN is high or the SoftPWDN bit (Control Register D[7]) is set, and powers down only when both are low."
},
{
"number": "39",
"name": "EQ1",
"type": "input",
"description": "Receive equalization level select pin for channel 1 (LVCMOS); functional regardless of the EN_smb state."
},
{
"number": "40",
"name": "EQ0",
"type": "input",
"description": "Receive equalization level select pin for channel 0 (LVCMOS); functional regardless of the EN_smb state."
},
{
"number": "41",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The page 3 pin diagram text is garbled, so the pin-to-number mapping was reconstructed from the diag; The exposed die attach pad is not numbered in the datasheet; it is listed as DAP and is given the nu; The requested MPN DS25CP104ATSQX has no /NOPB suffix; the package addendum on page 24 lists DS25CP10",
"exposed pad 41 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 9,
"cost_usd": 0.0882,
"at": "2026-10-08T03:05:13"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/ds25cp104a",
"pages": 31,
"sha256": "7bf748a9e0082456",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 41,
"described": 41,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds25cp104atsqx.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
6,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds25cp104atsqx-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
6,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f965d3602de5e853a40adade917199a416c9a05498f35f65dff5315b00ef1756",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "WQFN-40(6x6)",
"Category": "Logic",
"Pins": "41"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ds25cp104atsqx"
],
"discovery_pitch": "DS25CP104ATSQX (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
},
"files": [
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"README.md",
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"ds25cp104atsqx.glb",
"ds25cp104atsqx.step",
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"docs/ds25cp104atsqx-datasheet.pdf",
"viewers/symbol.html",
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"visibility": {
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}
}