component
DS25BR440TSQX
Public Made by Adomby adom
Texas Instruments LVDS ICs, WQFN-40(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "ds25br440tsqx",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments LVDS ICs, WQFN-40(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"communication interface chip",
"ds25br440tsqx",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"path": "docs/hero.png"
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"component": {
"mpn": "DS25BR440TSQX",
"manufacturer": "Texas Instruments",
"package": "WQFN-40(6x6)",
"pin_count": 41,
"category": "Communication Interface Chip",
"subcategory": "LVDS ICs",
"datasheet": "https://www.ti.com/cn/lit/gpn/ds25br440",
"parts": {
"symbol": "ds25br440tsqx.kicad_sym",
"footprint": "ds25br440tsqx.kicad_mod",
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"lbr": "ds25br440tsqx.lbr"
},
"distributor_links": {
"lcsc": "C5216065"
},
"distributor_check": {
"checked_at": "2026-10-22T20:27:21Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "IN0+",
"type": "input",
"description": "Non-inverting high speed LVDS input of channel 0 with internal 100Ω termination between IN0+ and IN0-."
},
{
"number": "2",
"name": "IN0-",
"type": "input",
"description": "Inverting high speed LVDS input of channel 0 with internal 100Ω termination between IN0+ and IN0-."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, 3.0V to 3.6V recommended operating range."
},
{
"number": "4",
"name": "IN1+",
"type": "input",
"description": "Non-inverting high speed LVDS input of channel 1 with internal 100Ω termination between IN1+ and IN1-."
},
{
"number": "5",
"name": "IN1-",
"type": "input",
"description": "Inverting high speed LVDS input of channel 1 with internal 100Ω termination between IN1+ and IN1-."
},
{
"number": "6",
"name": "IN2+",
"type": "input",
"description": "Non-inverting high speed LVDS input of channel 2 with internal 100Ω termination between IN2+ and IN2-."
},
{
"number": "7",
"name": "IN2-",
"type": "input",
"description": "Inverting high speed LVDS input of channel 2 with internal 100Ω termination between IN2+ and IN2-."
},
{
"number": "8",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, 3.0V to 3.6V recommended operating range."
},
{
"number": "9",
"name": "IN3+",
"type": "input",
"description": "Non-inverting high speed LVDS input of channel 3 with internal 100Ω termination between IN3+ and IN3-."
},
{
"number": "10",
"name": "IN3-",
"type": "input",
"description": "Inverting high speed LVDS input of channel 3 with internal 100Ω termination between IN3+ and IN3-."
},
{
"number": "11",
"name": "EQ2",
"type": "input",
"description": "LVCMOS receive equalization select for input IN2; 0 = OFF, 1 = ON."
},
{
"number": "12",
"name": "EQ3",
"type": "input",
"description": "LVCMOS receive equalization select for input IN3; 0 = OFF, 1 = ON."
},
{
"number": "13",
"name": "LOS3",
"type": "output",
"description": "Open drain LVCMOS loss-of-signal output reporting an open input fault at IN3; requires an external pull-up resistor."
},
{
"number": "14",
"name": "LOS0",
"type": "output",
"description": "Open drain LVCMOS loss-of-signal output reporting an open input fault at IN0; requires an external pull-up resistor."
},
{
"number": "15",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, 3.0V to 3.6V recommended operating range."
},
{
"number": "16",
"name": "GND",
"type": "power_in",
"description": "Ground pin."
},
{
"number": "17",
"name": "NC",
"type": "unconnected",
"description": "No connect pin that may be left floating."
},
{
"number": "18",
"name": "PE3",
"type": "input",
"description": "LVCMOS transmit pre-emphasis select for output OUT3; 0 = OFF, 1 = ON."
},
{
"number": "19",
"name": "PE2",
"type": "input",
"description": "LVCMOS transmit pre-emphasis select for output OUT2; 0 = OFF, 1 = ON."
},
{
"number": "20",
"name": "PE1",
"type": "input",
"description": "LVCMOS transmit pre-emphasis select for output OUT1; 0 = OFF, 1 = ON."
},
{
"number": "21",
"name": "OUT3-",
"type": "output",
"description": "Inverting high speed LVDS output of channel 3 with internal 100Ω termination between OUT3+ and OUT3-."
},
{
"number": "22",
"name": "OUT3+",
"type": "output",
"description": "Non-inverting high speed LVDS output of channel 3 with internal 100Ω termination between OUT3+ and OUT3-."
},
{
"number": "23",
"name": "OUT2-",
"type": "output",
"description": "Inverting high speed LVDS output of channel 2 with internal 100Ω termination between OUT2+ and OUT2-."
},
{
"number": "24",
"name": "OUT2+",
"type": "output",
"description": "Non-inverting high speed LVDS output of channel 2 with internal 100Ω termination between OUT2+ and OUT2-."
},
{
"number": "25",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, 3.0V to 3.6V recommended operating range."
},
{
"number": "26",
"name": "OUT1-",
"type": "output",
"description": "Inverting high speed LVDS output of channel 1 with internal 100Ω termination between OUT1+ and OUT1-."
},
{
"number": "27",
"name": "OUT1+",
"type": "output",
"description": "Non-inverting high speed LVDS output of channel 1 with internal 100Ω termination between OUT1+ and OUT1-."
},
{
"number": "28",
"name": "OUT0-",
"type": "output",
"description": "Inverting high speed LVDS output of channel 0 with internal 100Ω termination between OUT0+ and OUT0-."
},
{
"number": "29",
"name": "OUT0+",
"type": "output",
"description": "Non-inverting high speed LVDS output of channel 0 with internal 100Ω termination between OUT0+ and OUT0-."
},
{
"number": "30",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, 3.0V to 3.6V recommended operating range."
},
{
"number": "31",
"name": "PE0",
"type": "input",
"description": "LVCMOS transmit pre-emphasis select for output OUT0; 0 = OFF, 1 = ON."
},
{
"number": "32",
"name": "PWDN3",
"type": "input",
"description": "LVCMOS channel 3 output power down; low puts OUT3 in power down while the LOS circuitry on IN3 stays enabled."
},
{
"number": "33",
"name": "PWDN2",
"type": "input",
"description": "LVCMOS channel 2 output power down; low puts OUT2 in power down while the LOS circuitry on IN2 stays enabled."
},
{
"number": "34",
"name": "PWDN1",
"type": "input",
"description": "LVCMOS channel 1 output power down; low puts OUT1 in power down while the LOS circuitry on IN1 stays enabled."
},
{
"number": "35",
"name": "PWDN0",
"type": "input",
"description": "LVCMOS channel 0 output power down; low puts OUT0 in power down while the LOS circuitry on IN0 stays enabled."
},
{
"number": "36",
"name": "LOS2",
"type": "output",
"description": "Open drain LVCMOS loss-of-signal output reporting an open input fault at IN2; requires an external pull-up resistor."
},
{
"number": "37",
"name": "LOS1",
"type": "output",
"description": "Open drain LVCMOS loss-of-signal output reporting an open input fault at IN1; requires an external pull-up resistor."
},
{
"number": "38",
"name": "PWDN",
"type": "input",
"description": "LVCMOS device power down; low puts the device in power down mode and also disables the LOS circuitry."
},
{
"number": "39",
"name": "EQ1",
"type": "input",
"description": "LVCMOS receive equalization select for input IN1; 0 = OFF, 1 = ON."
},
{
"number": "40",
"name": "EQ0",
"type": "input",
"description": "LVCMOS receive equalization select for input IN0; 0 = OFF, 1 = ON."
},
{
"number": "41",
"name": "DAP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed pad is labeled 'DAP' in the datasheet and has no numeric pin number. It is shown as GND ; LOS outputs are open drain. They are typed 'output' because the schema has no open-collector class. "
],
"pages_sent": 21,
"cost_usd": 0.207,
"at": "2026-10-22T20:26:18"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/ds25br440",
"pages": 21,
"sha256": "a0c2d1b73307a048",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 41,
"described": 41,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds25br440tsqx.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
6.0,
1.0
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
"checked": "2026-10-22",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds25br440tsqx-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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6.0,
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"footprint_binding": "identity",
"sha256": "de7df76cb1ff1b18d6594163462f7bafce1b2d702da691e4133eafb166c467e1",
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]
}
}