component
DS25BR440TSQ
Public Made by Adomby adom
Texas Instruments LVDS ICs, QFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "DS25BR440TSQ",
"brief": "Texas Instruments LVDS ICs, QFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"manufacturer": "Texas Instruments",
"package": "QFN-40-EP(6x6)",
"pin_count": 41,
"category": "Interface ICs",
"subcategory": "LVDS ICs",
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"pins": [
{
"number": "1",
"name": "IN0+",
"type": "input",
"description": "Non-inverting high speed LVDS input for channel 0, internally terminated with 100 Ω between IN+ and IN-."
},
{
"number": "2",
"name": "IN0-",
"type": "input",
"description": "Inverting high speed LVDS input for channel 0, internally terminated with 100 Ω between IN+ and IN-."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, nominal 3.3 V with a recommended range of 3.0 V to 3.6 V."
},
{
"number": "4",
"name": "IN1+",
"type": "input",
"description": "Non-inverting high speed LVDS input for channel 1, internally terminated with 100 Ω between IN+ and IN-."
},
{
"number": "5",
"name": "IN1-",
"type": "input",
"description": "Inverting high speed LVDS input for channel 1, internally terminated with 100 Ω between IN+ and IN-."
},
{
"number": "6",
"name": "IN2+",
"type": "input",
"description": "Non-inverting high speed LVDS input for channel 2, internally terminated with 100 Ω between IN+ and IN-."
},
{
"number": "7",
"name": "IN2-",
"type": "input",
"description": "Inverting high speed LVDS input for channel 2, internally terminated with 100 Ω between IN+ and IN-."
},
{
"number": "8",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, nominal 3.3 V with a recommended range of 3.0 V to 3.6 V."
},
{
"number": "9",
"name": "IN3+",
"type": "input",
"description": "Non-inverting high speed LVDS input for channel 3, internally terminated with 100 Ω between IN+ and IN-."
},
{
"number": "10",
"name": "IN3-",
"type": "input",
"description": "Inverting high speed LVDS input for channel 3, internally terminated with 100 Ω between IN+ and IN-."
},
{
"number": "11",
"name": "EQ2",
"type": "input",
"description": "LVCMOS receive equalization level select for input IN2; L sets equalization OFF and H sets it ON."
},
{
"number": "12",
"name": "EQ3",
"type": "input",
"description": "LVCMOS receive equalization level select for input IN3; L sets equalization OFF and H sets it ON."
},
{
"number": "13",
"name": "LOS3",
"type": "output",
"description": "Open drain loss-of-signal output reporting an open input fault at IN3; external pull-up resistor required."
},
{
"number": "14",
"name": "LOS0",
"type": "output",
"description": "Open drain loss-of-signal output reporting an open input fault at IN0; external pull-up resistor required."
},
{
"number": "15",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, nominal 3.3 V with a recommended range of 3.0 V to 3.6 V."
},
{
"number": "16",
"name": "GND",
"type": "power_in",
"description": "Ground pin, together with the exposed die attach pad (DAP) which is also ground."
},
{
"number": "17",
"name": "NC",
"type": "unconnected",
"description": "No connect pin that may be left floating."
},
{
"number": "18",
"name": "PE3",
"type": "input",
"description": "LVCMOS transmit pre-emphasis level select for output OUT3; L sets pre-emphasis OFF and H sets it ON."
},
{
"number": "19",
"name": "PE2",
"type": "input",
"description": "LVCMOS transmit pre-emphasis level select for output OUT2; L sets pre-emphasis OFF and H sets it ON."
},
{
"number": "20",
"name": "PE1",
"type": "input",
"description": "LVCMOS transmit pre-emphasis level select for output OUT1; L sets pre-emphasis OFF and H sets it ON."
},
{
"number": "21",
"name": "OUT3-",
"type": "output",
"description": "Inverting high speed LVDS output for channel 3, with 100 Ω differential termination between OUT+ and OUT-."
},
{
"number": "22",
"name": "OUT3+",
"type": "output",
"description": "Non-inverting high speed LVDS output for channel 3, with 100 Ω differential termination between OUT+ and OUT-."
},
{
"number": "23",
"name": "OUT2-",
"type": "output",
"description": "Inverting high speed LVDS output for channel 2, with 100 Ω differential termination between OUT+ and OUT-."
},
{
"number": "24",
"name": "OUT2+",
"type": "output",
"description": "Non-inverting high speed LVDS output for channel 2, with 100 Ω differential termination between OUT+ and OUT-."
},
{
"number": "25",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, nominal 3.3 V with a recommended range of 3.0 V to 3.6 V."
},
{
"number": "26",
"name": "OUT1-",
"type": "output",
"description": "Inverting high speed LVDS output for channel 1, with 100 Ω differential termination between OUT+ and OUT-."
},
{
"number": "27",
"name": "OUT1+",
"type": "output",
"description": "Non-inverting high speed LVDS output for channel 1, with 100 Ω differential termination between OUT+ and OUT-."
},
{
"number": "28",
"name": "OUT0-",
"type": "output",
"description": "Inverting high speed LVDS output for channel 0, with 100 Ω differential termination between OUT+ and OUT-."
},
{
"number": "29",
"name": "OUT0+",
"type": "output",
"description": "Non-inverting high speed LVDS output for channel 0, with 100 Ω differential termination between OUT+ and OUT-."
},
{
"number": "30",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, nominal 3.3 V with a recommended range of 3.0 V to 3.6 V."
},
{
"number": "31",
"name": "PE0",
"type": "input",
"description": "LVCMOS transmit pre-emphasis level select for output OUT0; L sets pre-emphasis OFF and H sets it ON."
},
{
"number": "32",
"name": "PWDN3",
"type": "input",
"description": "LVCMOS channel output power down pin for OUT3; when set to L, output OUT3 is powered down while the LOS circuitry on IN3 remains enabled."
},
{
"number": "33",
"name": "PWDN2",
"type": "input",
"description": "LVCMOS channel output power down pin for OUT2; when set to L, output OUT2 is powered down while the LOS circuitry on IN2 remains enabled."
},
{
"number": "34",
"name": "PWDN1",
"type": "input",
"description": "LVCMOS channel output power down pin for OUT1; when set to L, output OUT1 is powered down while the LOS circuitry on IN1 remains enabled."
},
{
"number": "35",
"name": "PWDN0",
"type": "input",
"description": "LVCMOS channel output power down pin for OUT0; when set to L, output OUT0 is powered down while the LOS circuitry on IN0 remains enabled."
},
{
"number": "36",
"name": "LOS2",
"type": "output",
"description": "Open drain loss-of-signal output reporting an open input fault at IN2; external pull-up resistor required."
},
{
"number": "37",
"name": "LOS1",
"type": "output",
"description": "Open drain loss-of-signal output reporting an open input fault at IN1; external pull-up resistor required."
},
{
"number": "38",
"name": "PWDN",
"type": "input",
"description": "Device power down pin; when set to L, the device is in power down mode and the LOS circuitry is disabled as well."
},
{
"number": "39",
"name": "EQ1",
"type": "input",
"description": "LVCMOS receive equalization level select for input IN1; L sets equalization OFF and H sets it ON."
},
{
"number": "40",
"name": "EQ0",
"type": "input",
"description": "LVCMOS receive equalization level select for input IN0; L sets equalization OFF and H sets it ON."
},
{
"number": "41",
"name": "EP",
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"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
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"Package": "QFN-40-EP(6x6)",
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"name": "Supply Voltage (VCC)",
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"kind": "recommended_operating",
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"min": 3,
"typ": 3.3,
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{
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"min": -65,
"typ": null,
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{
"name": "Lead Temperature Range Soldering",
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"min": null,
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"max": 260,
"conditions": "Soldering (4 sec.)",
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{
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"symbol": "",
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{
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