component
DS100BR111SQ
Public Made by Adomby adom
Texas Instruments Signal Buffers, Repeaters, Splitters, WQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
DS100BR111SQ
Texas Instruments · Signal Buffers, Repeaters, Splitters · WQFN-24-EP(4x4)
DS100BR111SQ from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EQB0/AD3 | input | 4-level input that sets channel B equalization (EQB0) in pin mode (ENSMB = 0) and becomes SMBus slave address bit AD3 when ENSMB = 1. |
| 2 | EQB1/AD2 | input | 4-level input that sets channel B equalization (EQB1) in pin mode (ENSMB = 0) and becomes SMBus slave address bit AD2 when ENSMB = 1. |
| 3 | ENSMB | input | 4-level SMBus enable: High = SMBus slave mode register access, Float = read external EEPROM (SMBus master mode), tie 1 kΩ to GND = pin mode. |
| 4 | SDA/DEMA | bidirectional | In SMBus modes it is the SMBus data I/O (open drain, external 2 kΩ to 5 kΩ pull-up recommended); in pin mode (ENSMB = 0) it is the 4-level DEMA input setting channel A de-emphasis. |
| 5 | SCL/DEMB | bidirectional | In SMBus modes it is the SMBus clock (output while loading EEPROM, then input; open drain, external 2 kΩ to 5 kΩ pull-up recommended); in pin mode (ENSMB = 0) it is the 4-level DEMB input setting channel B de-emphasis. |
| 6 | TX_DIS | input | 2-level LVCMOS input: High = OUTA enabled and OUTB disabled, Low = OUTA and OUTB enabled. |
| 7 | OUTA+ | output | Non-inverting 50 Ω CML driver output of channel A with de-emphasis, compatible with AC-coupled CML inputs. |
| 8 | OUTA- | output | Inverting 50 Ω CML driver output of channel A with de-emphasis, compatible with AC-coupled CML inputs. |
| 9 | AD1/EQA1 | input | 4-level input that sets channel A equalization (EQA1) in pin mode (ENSMB = 0) and is SMBus slave address bit AD1 in SMBus mode. |
| 10 | AD0/EQA0 | input | 4-level input that sets channel A equalization (EQA0) in pin mode (ENSMB = 0) and is SMBus slave address bit AD0 in SMBus mode. |
| 11 | INB+ | input | Non-inverting CML differential input to the channel B equalizer, with on-chip 50 Ω termination to VDD, compatible with AC-coupled CML inputs. |
| 12 | INB- | input | Inverting CML differential input to the channel B equalizer, with on-chip 50 Ω termination to VDD, compatible with AC-coupled CML inputs. |
| 13 | LOS | output | Open-drain loss-of-signal indicator (default is LOS on INA), modifiable via SMBus registers. |
| 14 | SD_TH | input | 4-level input setting the LOS assert/deassert threshold: High = 190/130 mVpp, Float = 180/110 mVpp (default), 20 kΩ to GND = 160/100 mVpp, 1 kΩ to GND = 210/150 mVpp. |
| 15 | VIN | power_in | 3.3 V ± 10% input to the internal LDO regulator; must be left floating in 2.5 V mode. |
| 16 | VDD_SEL | input | Enables the 3.3 V to 2.5 V internal regulator: Low = 3.3 V operation, Float = 2.5 V operation. |
| 17 | VOD_SEL/READEN | input | VOD select (High = 10G-KR mode 1.1 or 1.3 Vpp, Float = 1.0 Vpp, 20 kΩ to GND = 1.2 Vpp, 1 kΩ to GND = 700 mVpp); in EEPROM master mode (ENSMB = Float) a low starts the EEPROM load, and in SMBus slave mode it must be low for AD[3:0] to be active, otherwise address 0xB0 is used. |
| 18 | MODE/DONE | bidirectional | 4-level MODE input selects operation (High = 10GbE, Float = 10G-KR slow OOB, 20 kΩ to GND = eSATA, 1 kΩ to GND = SAS); with an external EEPROM (ENSMB = Float) it is the DONE output (High = load failed or incomplete, Low = load passed). |
| 19 | OUTB- | output | Inverting 50 Ω CML driver output of channel B with de-emphasis, compatible with AC-coupled CML inputs. |
| 20 | OUTB+ | output | Non-inverting 50 Ω CML driver output of channel B with de-emphasis, compatible with AC-coupled CML inputs. |
| 21 | VDD | power_in | Supply pin: connect to 2.5 V in 2.5 V mode; in 3.3 V mode do not connect a supply and use only for 100 nF decoupling. |
| 22 | VDD | power_in | Supply pin: connect to 2.5 V in 2.5 V mode; in 3.3 V mode do not connect a supply and use only for 100 nF decoupling. |
| 23 | INA- | input | Inverting CML differential input to the channel A equalizer, with on-chip 50 Ω termination to VDD, compatible with AC-coupled CML inputs. |
| 24 | INA+ | input | Non-inverting CML differential input to the channel A equalizer, with on-chip 50 Ω termination to VDD, compatible with AC-coupled CML inputs. |
| 25 | GND | power_in | Exposed die attach pad (DAP) is the device ground and must be connected to GND through at least 4 vias for electrical and thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24-EP(4x4) |
| Category | Interface |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
DS100BR111SQ - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
ds100br111sq-etched.step/ds100br111sq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds100br111sq.step/ds100br111sq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (56 pp, sha256
5c7dad53e562f35b, retrieved 2026-10-12, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).