component
DRV8824RHDR
Public Made by Adomby adom
Texas Instruments Motor Driver ICs, VQFN-28-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DRV8824RHDR
Texas Instruments · Motor Driver ICs · VQFN-28-EP(5x5)
DRV8824RHDR from Texas Instruments, in a VQFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MODE2 | input | Microstep mode 2 input; MODE0 through MODE2 set full, 1/2, 1/4, 1/8, 1/16 or 1/32 step, with internal pulldown. |
| 2 | nHOME | output | Open-drain home position output that is logic low when at the home state of the step table. |
| 3 | GND | power_in | Device ground. |
| 4 | CP1 | passive | Charge pump flying capacitor pin; connect a 0.01-µF 50-V capacitor between CP1 and CP2. |
| 5 | CP2 | passive | Charge pump flying capacitor pin; connect a 0.01-µF 50-V capacitor between CP1 and CP2. |
| 6 | VCP | passive | High-side gate drive voltage; connect a 0.1-µF 16-V ceramic capacitor, and optionally a 1-MΩ resistor to VM to accelerate discharge of the VCP capacitor. |
| 7 | VMA | power_in | Bridge A power supply; connect to motor supply (8.2 to 45 V), same supply as VMB, bypassed with a 0.1-µF capacitor to GND plus bulk capacitance. |
| 8 | AOUT1 | output | Bridge A output 1; connect to bipolar stepper motor winding A. |
| 9 | ISENA | passive | Bridge A ground / Isense; connect to current sense resistor for bridge A. |
| 10 | AOUT2 | output | Bridge A output 2; positive current is AOUT1 to AOUT2. |
| 11 | BOUT2 | output | Bridge B output 2; positive current is BOUT1 to BOUT2. |
| 12 | ISENB | passive | Bridge B ground / Isense; connect to current sense resistor for bridge B. |
| 13 | BOUT1 | output | Bridge B output 1; connect to bipolar stepper motor winding B. |
| 14 | VMB | power_in | Bridge B power supply; connect to motor supply (8.2 to 45 V), same supply as VMA, bypassed with a 0.1-µF capacitor to GND plus bulk capacitance. |
| 15 | AVREF | input | Bridge A current set reference input; normally tied to the same voltage as BVREF and can be connected to V3P3OUT. |
| 16 | BVREF | input | Bridge B current set reference input; normally tied to the same voltage as AVREF and can be connected to V3P3OUT. |
| 17 | GND | power_in | Device ground. |
| 18 | V3P3OUT | power_out | 3.3-V regulator output; bypass to GND with a 0.47-µF 6.3-V ceramic capacitor, can supply VREF, max load 1 mA. |
| 19 | nRESET | input | Active-low reset input that initializes the indexer logic and disables the H-bridge outputs, with internal pulldown. |
| 20 | nSLEEP | input | Sleep mode input; logic high enables the device, logic low enters low-power sleep mode, with internal pulldown. |
| 21 | nFAULT | output | Open-drain fault output that is logic low in a fault condition (overtemperature, overcurrent). |
| 22 | DECAY | input | Decay mode input: low = slow decay, open = mixed decay, high = fast decay, with internal pulldown and pullup. |
| 23 | DIR | input | Direction input whose level sets the direction of stepping, with internal pulldown. |
| 24 | nENBL | input | Enable input; logic high disables outputs and indexer operation, logic low enables, with internal pulldown. |
| 25 | STEP | input | Step input where a rising edge moves the indexer one step, with internal pulldown. |
| 26 | NC | unconnected | No connect; leave this pin unconnected. |
| 27 | MODE0 | input | Microstep mode 0 input; MODE0 through MODE2 set full, 1/2, 1/4, 1/8, 1/16 or 1/32 step, with internal pulldown. |
| 28 | MODE1 | input | Microstep mode 1 input; MODE0 through MODE2 set full, 1/2, 1/4, 1/8, 1/16 or 1/32 step, with internal pulldown. |
| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-28-EP(5x5) |
| Category | Power Supply Chip |
| Pins | 29 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | V(VMx) | -0.3 | 47 | V | over operating free-air temperature | 5 | |
| Power supply ramp rate | V(VMx) | 1 | V/µs | 5 | |||
| Digital pin voltage | -0.5 | 7 | V | 5 | |||
| xVREF input voltage | V(xVREF) | -0.3 | 4 | V | 5 | ||
| ISENSEx pin voltage | -0.8 | 0.8 | V | Transients of ±1 V for less than 25 ns are acceptable | 5 | ||
| Continuous motor drive output current | 1.6 | A | Power dissipation and thermal limits must be observed | 5 | |||
| Operating virtual junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature | Tstg | -60 | 150 | °C | 5 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human body model, all pins | 5 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged device model, all pins | 5 | |
| Motor power supply voltage range | V(VMx) | 8.2 | 45 | V | All VM pins connected to same supply | 5 | |
| VREF input voltage | V(xVREF) | 1 | 3.5 | V | Operational at VREF between 0 and 1 V, but accuracy is degraded | 5 | |
| V3P3OUT load current | IV3P3 | 1 | mA | 5 | |||
| Junction-to-ambient thermal resistance | RθJA | 35.8 | °C/W | RHD (VQFN) 28 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 25.1 | °C/W | RHD (VQFN) 28 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 8.2 | °C/W | RHD (VQFN) 28 pins | 5 | ||
| Junction-to-top characterization parameter | ψJT | 0.3 | °C/W | RHD (VQFN) 28 pins | 5 | ||
| Junction-to-board characterization parameter | ψJB | 8.2 | °C/W | RHD (VQFN) 28 pins | 5 | ||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 1.1 | °C/W | RHD (VQFN) 28 pins | 5 | ||
| VMx operating supply current | IVMx | 5 | 8 | mA | V(VMx) = 24 V, ƒPWM < 50 kHz | 6 | |
| VMx sleep mode supply current | IVMxQ | 10 | 20 | μA | V(VMx) = 24 V | 6 | |
| V3P3OUT voltage | V3P3 | 3.18 | 3.3 | 3.42 | V | IOUT = 0 to 1 mA, V(VMx) = 24 V, TJ = 25°C | 6 |
| V3P3OUT voltage | V3P3 | 3.1 | 3.3 | 3.5 | V | IOUT = 0 to 1 mA | 6 |
| Input low voltage | VIL | 0 | 0.7 | V | Logic-level inputs | 6 | |
| Input high voltage | VIH | 2 | 5.25 | V | Logic-level inputs | 6 | |
| Input hysteresis | VHYS | 0.45 | V | 6 | |||
| Input low current | IIL | -20 | 20 | μA | V(VIN) = 0 | 6 | |
| Input high current | IIH | 100 | μA | V(VIN) = 3.3 V | 6 | ||
| Internal pulldown resistance | RPD | 100 | kΩ | nENBL, nRESET, DIR, STEP, MODEx | 6 | ||
| Internal pulldown resistance | RPD | 1 | MΩ | nSLEEP | 6 | ||
| Output low voltage | VOL | 0.5 | V | IO = 5 mA, nHOME/nFAULT | 6 | ||
| Output high leakage current | IOH | 1 | μA | VO = 3.3 V | 6 | ||
| Input low threshold voltage (DECAY) | VIL | 0.8 | V | For slow decay mode | 6 | ||
| Input high threshold voltage (DECAY) | VIH | 2 | V | For fast decay mode | 6 | ||
| DECAY input current | IIN | -100 | 100 | µA | 6 | ||
| DECAY internal pullup resistance | RPU | 130 | kΩ | 6 | |||
| DECAY internal pulldown resistance | RPD | 80 | kΩ | 6 | |||
| HS FET on resistance | RDS(ON) | 0.63 | Ω | V(VMx) = 24 V, IO = 1 A, TJ = 25°C | 6 | ||
| HS FET on resistance | RDS(ON) | 0.76 | 0.9 | Ω | V(VMx) = 24 V, IO = 1 A, TJ = 85°C | 6 | |
| LS FET on resistance | RDS(ON) | 0.65 | Ω | V(VMx) = 24 V, IO = 1 A, TJ = 25°C | 6 | ||
| LS FET on resistance | RDS(ON) | 0.78 | 0.9 | Ω | V(VMx) = 24 V, IO = 1 A, TJ = 85°C | 6 | |
| Off-state leakage current | IOFF | -20 | 20 | μA | 6 | ||
| Internal PWM frequency | ƒPWM | 50 | kHz | 6 | |||
| Current sense blanking time | tBLANK | 3.75 | μs | 6 | |||
| Rise time | tR | 100 | 360 | ns | V(VMx) = 24 V | 6 | |
| Fall time | tF | 80 | 250 | ns | V(VMx) = 24 V | 6 | |
| Dead time | tDEAD | 400 | ns | 6 | |||
| VMx undervoltage lockout voltage | VUVLO | 8.2 | V | V(VMx) rising | 6 | ||
| Overcurrent protection trip level | IOCP | 1.8 | 5 | A | 6 | ||
| Overcurrent deglitch time | tDEG | 3 | µs | 6 | |||
| Thermal shutdown temperature | TTSD | 150 | 160 | 180 | °C | Die temperature | 6 |
| xVREF input current | IREF | -3 | 3 | μA | V(xVREF) = 3.3 V | 6 | |
| xISENSE trip voltage | VTRIP | 635 | 660 | 685 | mV | V(xVREF) = 3.3 V, 100% current setting | 7 |
| Current trip accuracy | ΔITRIP | -25 | 25 | % | V(xVREF) = 3.3 V, 5% current setting | 7 | |
| Current trip accuracy | ΔITRIP | -15 | 15 | % | V(xVREF) = 3.3 V, 10% to 34% current setting | 7 | |
| Current trip accuracy | ΔITRIP | -10 | 10 | % | V(xVREF) = 3.3 V, 38% to 67% current setting | 7 | |
| Current trip accuracy | ΔITRIP | -5 | 5 | % | V(xVREF) = 3.3 V, 71% to 100% current setting | 7 | |
| Current sense amplifier gain | AISENSE | 5 | V/V | Reference only | 7 | ||
| Step frequency | ƒSTEP | 175 | kHz | 7 | |||
| Pulse duration, STEP high | tWH(STEP) | 2.8 | μs | 7 | |||
| Pulse duration, STEP low | tWL(STEP) | 2.8 | μs | 7 | |||
| Setup time, command before STEP rising | tSU(STEP) | 200 | ns | 7 | |||
| Hold time, command after STEP rising | tH(STEP) | 200 | ns | 7 | |||
| Enable time, nENBL active to STEP | tENBL | 200 | ns | 7 | |||
| Wakeup time, nSLEEP inactive high to STEP input accepted | tWAKE | 1 | ms | 7 |
CAD (KiCad official)
- Symbol:
DRV8824RHDR - Footprint:
Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm - 3D model: VQFN-28-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
drv8824rhdr-etched.step/drv8824rhdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);drv8824rhdr.step/drv8824rhdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
1892628a6c17ad0f, retrieved 2026-10-31, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DRV8824RHDR
**Texas Instruments** · Motor Driver ICs · VQFN-28-EP(5x5)
DRV8824RHDR from Texas Instruments, in a VQFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MODE2 | input | Microstep mode 2 input; MODE0 through MODE2 set full, 1/2, 1/4, 1/8, 1/16 or 1/32 step, with internal pulldown. |
| 2 | nHOME | output | Open-drain home position output that is logic low when at the home state of the step table. |
| 3 | GND | power_in | Device ground. |
| 4 | CP1 | passive | Charge pump flying capacitor pin; connect a 0.01-µF 50-V capacitor between CP1 and CP2. |
| 5 | CP2 | passive | Charge pump flying capacitor pin; connect a 0.01-µF 50-V capacitor between CP1 and CP2. |
| 6 | VCP | passive | High-side gate drive voltage; connect a 0.1-µF 16-V ceramic capacitor, and optionally a 1-MΩ resistor to VM to accelerate discharge of the VCP capacitor. |
| 7 | VMA | power_in | Bridge A power supply; connect to motor supply (8.2 to 45 V), same supply as VMB, bypassed with a 0.1-µF capacitor to GND plus bulk capacitance. |
| 8 | AOUT1 | output | Bridge A output 1; connect to bipolar stepper motor winding A. |
| 9 | ISENA | passive | Bridge A ground / Isense; connect to current sense resistor for bridge A. |
| 10 | AOUT2 | output | Bridge A output 2; positive current is AOUT1 to AOUT2. |
| 11 | BOUT2 | output | Bridge B output 2; positive current is BOUT1 to BOUT2. |
| 12 | ISENB | passive | Bridge B ground / Isense; connect to current sense resistor for bridge B. |
| 13 | BOUT1 | output | Bridge B output 1; connect to bipolar stepper motor winding B. |
| 14 | VMB | power_in | Bridge B power supply; connect to motor supply (8.2 to 45 V), same supply as VMA, bypassed with a 0.1-µF capacitor to GND plus bulk capacitance. |
| 15 | AVREF | input | Bridge A current set reference input; normally tied to the same voltage as BVREF and can be connected to V3P3OUT. |
| 16 | BVREF | input | Bridge B current set reference input; normally tied to the same voltage as AVREF and can be connected to V3P3OUT. |
| 17 | GND | power_in | Device ground. |
| 18 | V3P3OUT | power_out | 3.3-V regulator output; bypass to GND with a 0.47-µF 6.3-V ceramic capacitor, can supply VREF, max load 1 mA. |
| 19 | nRESET | input | Active-low reset input that initializes the indexer logic and disables the H-bridge outputs, with internal pulldown. |
| 20 | nSLEEP | input | Sleep mode input; logic high enables the device, logic low enters low-power sleep mode, with internal pulldown. |
| 21 | nFAULT | output | Open-drain fault output that is logic low in a fault condition (overtemperature, overcurrent). |
| 22 | DECAY | input | Decay mode input: low = slow decay, open = mixed decay, high = fast decay, with internal pulldown and pullup. |
| 23 | DIR | input | Direction input whose level sets the direction of stepping, with internal pulldown. |
| 24 | nENBL | input | Enable input; logic high disables outputs and indexer operation, logic low enables, with internal pulldown. |
| 25 | STEP | input | Step input where a rising edge moves the indexer one step, with internal pulldown. |
| 26 | NC | unconnected | No connect; leave this pin unconnected. |
| 27 | MODE0 | input | Microstep mode 0 input; MODE0 through MODE2 set full, 1/2, 1/4, 1/8, 1/16 or 1/32 step, with internal pulldown. |
| 28 | MODE1 | input | Microstep mode 1 input; MODE0 through MODE2 set full, 1/2, 1/4, 1/8, 1/16 or 1/32 step, with internal pulldown. |
| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-28-EP(5x5) |
| Category | Power Supply Chip |
| Pins | 29 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | V(VMx) | -0.3 | | 47 | V | over operating free-air temperature | 5 |
| Power supply ramp rate | V(VMx) | | | 1 | V/µs | | 5 |
| Digital pin voltage | | -0.5 | | 7 | V | | 5 |
| xVREF input voltage | V(xVREF) | -0.3 | | 4 | V | | 5 |
| ISENSEx pin voltage | | -0.8 | | 0.8 | V | Transients of ±1 V for less than 25 ns are acceptable | 5 |
| Continuous motor drive output current | | | | 1.6 | A | Power dissipation and thermal limits must be observed | 5 |
| Operating virtual junction temperature | TJ | -40 | | 150 | °C | | 5 |
| Storage temperature | Tstg | -60 | | 150 | °C | | 5 |
| ESD HBM | V(ESD) | -2000 | | 2000 | V | Human body model, all pins | 5 |
| ESD CDM | V(ESD) | -500 | | 500 | V | Charged device model, all pins | 5 |
| Motor power supply voltage range | V(VMx) | 8.2 | | 45 | V | All VM pins connected to same supply | 5 |
| VREF input voltage | V(xVREF) | 1 | | 3.5 | V | Operational at VREF between 0 and 1 V, but accuracy is degraded | 5 |
| V3P3OUT load current | IV3P3 | | | 1 | mA | | 5 |
| Junction-to-ambient thermal resistance | RθJA | | 35.8 | | °C/W | RHD (VQFN) 28 pins | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 25.1 | | °C/W | RHD (VQFN) 28 pins | 5 |
| Junction-to-board thermal resistance | RθJB | | 8.2 | | °C/W | RHD (VQFN) 28 pins | 5 |
| Junction-to-top characterization parameter | ψJT | | 0.3 | | °C/W | RHD (VQFN) 28 pins | 5 |
| Junction-to-board characterization parameter | ψJB | | 8.2 | | °C/W | RHD (VQFN) 28 pins | 5 |
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | | 1.1 | | °C/W | RHD (VQFN) 28 pins | 5 |
| VMx operating supply current | IVMx | | 5 | 8 | mA | V(VMx) = 24 V, ƒPWM < 50 kHz | 6 |
| VMx sleep mode supply current | IVMxQ | | 10 | 20 | μA | V(VMx) = 24 V | 6 |
| V3P3OUT voltage | V3P3 | 3.18 | 3.3 | 3.42 | V | IOUT = 0 to 1 mA, V(VMx) = 24 V, TJ = 25°C | 6 |
| V3P3OUT voltage | V3P3 | 3.1 | 3.3 | 3.5 | V | IOUT = 0 to 1 mA | 6 |
| Input low voltage | VIL | 0 | | 0.7 | V | Logic-level inputs | 6 |
| Input high voltage | VIH | 2 | | 5.25 | V | Logic-level inputs | 6 |
| Input hysteresis | VHYS | | 0.45 | | V | | 6 |
| Input low current | IIL | -20 | | 20 | μA | V(VIN) = 0 | 6 |
| Input high current | IIH | | | 100 | μA | V(VIN) = 3.3 V | 6 |
| Internal pulldown resistance | RPD | | 100 | | kΩ | nENBL, nRESET, DIR, STEP, MODEx | 6 |
| Internal pulldown resistance | RPD | | 1 | | MΩ | nSLEEP | 6 |
| Output low voltage | VOL | | | 0.5 | V | IO = 5 mA, nHOME/nFAULT | 6 |
| Output high leakage current | IOH | | | 1 | μA | VO = 3.3 V | 6 |
| Input low threshold voltage (DECAY) | VIL | | | 0.8 | V | For slow decay mode | 6 |
| Input high threshold voltage (DECAY) | VIH | 2 | | | V | For fast decay mode | 6 |
| DECAY input current | IIN | -100 | | 100 | µA | | 6 |
| DECAY internal pullup resistance | RPU | | 130 | | kΩ | | 6 |
| DECAY internal pulldown resistance | RPD | | 80 | | kΩ | | 6 |
| HS FET on resistance | RDS(ON) | | 0.63 | | Ω | V(VMx) = 24 V, IO = 1 A, TJ = 25°C | 6 |
| HS FET on resistance | RDS(ON) | | 0.76 | 0.9 | Ω | V(VMx) = 24 V, IO = 1 A, TJ = 85°C | 6 |
| LS FET on resistance | RDS(ON) | | 0.65 | | Ω | V(VMx) = 24 V, IO = 1 A, TJ = 25°C | 6 |
| LS FET on resistance | RDS(ON) | | 0.78 | 0.9 | Ω | V(VMx) = 24 V, IO = 1 A, TJ = 85°C | 6 |
| Off-state leakage current | IOFF | -20 | | 20 | μA | | 6 |
| Internal PWM frequency | ƒPWM | | 50 | | kHz | | 6 |
| Current sense blanking time | tBLANK | | 3.75 | | μs | | 6 |
| Rise time | tR | 100 | | 360 | ns | V(VMx) = 24 V | 6 |
| Fall time | tF | 80 | | 250 | ns | V(VMx) = 24 V | 6 |
| Dead time | tDEAD | | 400 | | ns | | 6 |
| VMx undervoltage lockout voltage | VUVLO | | | 8.2 | V | V(VMx) rising | 6 |
| Overcurrent protection trip level | IOCP | 1.8 | | 5 | A | | 6 |
| Overcurrent deglitch time | tDEG | | 3 | | µs | | 6 |
| Thermal shutdown temperature | TTSD | 150 | 160 | 180 | °C | Die temperature | 6 |
| xVREF input current | IREF | -3 | | 3 | μA | V(xVREF) = 3.3 V | 6 |
| xISENSE trip voltage | VTRIP | 635 | 660 | 685 | mV | V(xVREF) = 3.3 V, 100% current setting | 7 |
| Current trip accuracy | ΔITRIP | -25 | | 25 | % | V(xVREF) = 3.3 V, 5% current setting | 7 |
| Current trip accuracy | ΔITRIP | -15 | | 15 | % | V(xVREF) = 3.3 V, 10% to 34% current setting | 7 |
| Current trip accuracy | ΔITRIP | -10 | | 10 | % | V(xVREF) = 3.3 V, 38% to 67% current setting | 7 |
| Current trip accuracy | ΔITRIP | -5 | | 5 | % | V(xVREF) = 3.3 V, 71% to 100% current setting | 7 |
| Current sense amplifier gain | AISENSE | | 5 | | V/V | Reference only | 7 |
| Step frequency | ƒSTEP | | | 175 | kHz | | 7 |
| Pulse duration, STEP high | tWH(STEP) | 2.8 | | | μs | | 7 |
| Pulse duration, STEP low | tWL(STEP) | 2.8 | | | μs | | 7 |
| Setup time, command before STEP rising | tSU(STEP) | 200 | | | ns | | 7 |
| Hold time, command after STEP rising | tH(STEP) | 200 | | | ns | | 7 |
| Enable time, nENBL active to STEP | tENBL | 200 | | | ns | | 7 |
| Wakeup time, nSLEEP inactive high to STEP input accepted | tWAKE | | | 1 | ms | | 7 |
## CAD (KiCad official)
- Symbol: `DRV8824RHDR`
- Footprint: `Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm`
- 3D model: VQFN-28-EP(5x5) (KiCad packages3D, STEP)
- 3D model files: `drv8824rhdr-etched.step` / `drv8824rhdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8824rhdr.step` / `drv8824rhdr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/drv8824rh.pdf) (39 pp, sha256 `1892628a6c17ad0f`, retrieved 2026-10-31, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/drv8824rhdr-datasheet.pdf)