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Contents

README

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DRV8800PWPR

Texas Instruments · Brushed DC Motor Drivers · TSSOP-16-EP

DRV8800PWPR from Texas Instruments, in a TSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 nFAULT output Open-drain fault output, pulled low on motor fault, supply undervoltage, or junction temperature exceeding 160°C; requires external pullup resistor.
2 MODE input Mode selection input. Logic high selects slow-decay mode, logic low selects fast-decay mode. Input threshold VIH ≥ 2V, VIL ≤ 0.8V.
3 PHASE input Phase/direction control input. Logic high = forward, logic low = reverse. Controls H-bridge direction. Input threshold VIH ≥ 2V, VIL ≤ 0.8V.
4 GND power_in Device ground and return path for power supply and signal circuits.
5 nSLEEP input Sleep mode enable input. Logic high enables device operation, logic low enters low-power sleep mode with <10µA quiescent current. Internal pulldown resistor. Input threshold VIH ≥ 2.7V, VIL ≤ 0.8V.
6 ENABLE input Output enable control input. Logic high enables H-bridge, logic low disables output. Input threshold VIH ≥ 2V, VIL ≤ 0.8V.
7 OUT+ output H-bridge positive output to motor. Rated for ±2.8A peak current, typical RDS(on) = 0.4Ω at 25°C, 0.7Ω at 125°C.
8 SENSE output Current sense return output. Connect external 0.2Ω sense resistor between SENSE pin and ground to set overcurrent threshold at 500mV (2.8A typical); adjustable via RSENSE value.
9 VBB power_in Motor driver supply voltage input, operating range 8V to 36V. Bypass to GND with 0.1µF ceramic + 100µF bulk capacitor. Undervoltage lockout threshold 6.5V rising.
10 OUT- output H-bridge negative output to motor. Rated for ±2.8A peak current, typical RDS(on) = 0.4Ω at 25°C, 0.7Ω at 125°C.
11 CP1 passive Charge pump switching node. Connect 0.1µF X7R ceramic capacitor between CP1 and CP2; capacitor must be rated for VBB voltage.
12 CP2 passive Charge pump switching node. Connect 0.1µF X7R ceramic capacitor between CP1 and CP2; capacitor must be rated for VBB voltage.
13 GND power_in Device ground and return path for power supply and signal circuits.
14 VCP power_out Charge pump output and gate drive supply reservoir. Connect 0.1µF 16V X7R ceramic capacitor to VBB. Monitored internally; outputs disable if VCP falls below charge pump undervoltage threshold.
15 VREG output Regulated 7.5V reference voltage output. Leave disconnected in normal operation; provides internal regulator voltage reference measurement point. Do not load.
16 NC unconnected No connection. Must remain unconnected to any circuit node.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16-EP
Category Motor Driver ICs
Pins 17

CAD (KiCad official)

  • Symbol: DRV8800PWPR
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: drv8800pwpr-etched.step / drv8800pwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8800pwpr.step / drv8800pwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 8498d1c74347b1a9, retrieved 2026-09-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF