component
DRV8714SQRVJRQ1
Public Made by Adomby adom
Texas Instruments Gate Drivers, VQFN-56(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "drv8714sqrvjrq1",
"title": "DRV8714SQRVJRQ1",
"brief": "Texas Instruments Gate Drivers, VQFN-56(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"motor driver ics",
"drv8714sqrvjrq1",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "DRV8714SQRVJRQ1",
"manufacturer": "Texas Instruments",
"package": "VQFN-56(8x8)",
"pin_count": 57,
"category": "Motor Driver ICs",
"subcategory": "Gate Drivers",
"datasheet": "https://www.ti.com/cn/lit/gpn/drv8714-q1",
"parts": {
"symbol": "drv8714sqrvjrq1.kicad_sym",
"footprint": "drv8714sqrvjrq1.kicad_mod",
"model_3d": "drv8714sqrvjrq1-hero.glb",
"model_3d_plain": "drv8714sqrvjrq1-etched.glb",
"model_3d_step": "drv8714sqrvjrq1-etched.step",
"model_3d_step_plain": "drv8714sqrvjrq1.step",
"lbr": "drv8714sqrvjrq1.lbr"
},
"distributor_links": {
"lcsc": "C3655767",
"mouser": "595-DRV8714SQRVJRQ1"
},
"distributor_check": {
"checked_at": "2026-10-19T08:24:23Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "error"
},
"mouser": {
"pn": "595-DRV8714SQRVJRQ1",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "SCLK",
"type": "input",
"description": "Serial clock input; SPI data is shifted out and captured on the corresponding rising and falling edges of this pin, with an internal pull-down."
},
{
"number": "2",
"name": "SDI",
"type": "input",
"description": "Serial data input, captured on the falling edge of SCLK, with an internal pull-down."
},
{
"number": "3",
"name": "SDO",
"type": "output",
"description": "Serial data output, shifted out on the rising edge of SCLK; push-pull output referenced to the DVDD input."
},
{
"number": "4",
"name": "IN1/EN1",
"type": "input",
"description": "Half-bridge and H-bridge control input (IN1 or EN1 depending on mode, see section 7.3.3), with an internal pull-down."
},
{
"number": "5",
"name": "IN2/PH1",
"type": "input",
"description": "Half-bridge and H-bridge control input (IN2 or PH1 depending on mode, see section 7.3.3), with an internal pull-down."
},
{
"number": "6",
"name": "IN3/EN2",
"type": "input",
"description": "Half-bridge and H-bridge control input (IN3 or EN2 depending on mode, see section 7.3.3), with an internal pull-down."
},
{
"number": "7",
"name": "IN4/PH2",
"type": "input",
"description": "Half-bridge and H-bridge control input (IN4 or PH2 depending on mode, see section 7.3.3), with an internal pull-down."
},
{
"number": "8",
"name": "nSLEEP",
"type": "input",
"description": "Device enable pin; driving it to logic low shuts the device down into sleep mode, with an internal pull-down."
},
{
"number": "9",
"name": "DRVOFF/nFLT",
"type": "bidirectional",
"description": "Multi-function pin: DRVOFF global gate driver disable input (logic high disables the drivers) or nFLT open-drain fault indicator output that requires an external pull-up; internal pull-down."
},
{
"number": "10",
"name": "AREF",
"type": "power_in",
"description": "External voltage reference and supply for the current shunt amplifiers; a 0.1 µF, 6.3 V ceramic capacitor to AGND is recommended, with AREF specified at 3 V to 5.5 V."
},
{
"number": "11",
"name": "AGND",
"type": "power_in",
"description": "Device ground for the shunt amplifier section; connect to system ground."
},
{
"number": "12",
"name": "SO1",
"type": "output",
"description": "Current shunt amplifier 1 output, clamped to the AREF voltage to protect the controller ADC input."
},
{
"number": "13",
"name": "SO2",
"type": "output",
"description": "Current shunt amplifier 2 output, clamped to the AREF voltage to protect the controller ADC input."
},
{
"number": "14",
"name": "BRAKE",
"type": "input",
"description": "Power-off braking pin; driving it high during low-power sleep mode enables the low-side gate drivers, with an internal pull-down, and it must be tied to GND if the feature is unused."
},
{
"number": "15",
"name": "SP1",
"type": "input",
"description": "Shunt amplifier 1 non-inverting input; connect to the positive terminal of the shunt resistor."
},
{
"number": "16",
"name": "SN1",
"type": "input",
"description": "Shunt amplifier 1 inverting input; connect to the negative terminal of the shunt resistor."
},
{
"number": "17",
"name": "SP2",
"type": "input",
"description": "Shunt amplifier 2 non-inverting input; connect to the positive terminal of the shunt resistor."
},
{
"number": "18",
"name": "SN2",
"type": "input",
"description": "Shunt amplifier 2 inverting input; connect to the negative terminal of the shunt resistor."
},
{
"number": "19",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is GL1 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "20",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is SH1 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "21",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is GH1 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "22",
"name": "GH1",
"type": "output",
"description": "High-side gate driver output for half-bridge 1; connects to the gate of the high-side MOSFET."
},
{
"number": "23",
"name": "SH1",
"type": "input",
"description": "High-side source sense input for half-bridge 1; connects to the high-side MOSFET source."
},
{
"number": "24",
"name": "GL1",
"type": "output",
"description": "Low-side gate driver output for half-bridge 1; connects to the gate of the low-side MOSFET."
},
{
"number": "25",
"name": "PGND1",
"type": "power_in",
"description": "Low-side MOSFET gate driver 1-4 sense and power return; connect to system ground close to the device and half-bridges 1-4."
},
{
"number": "26",
"name": "GL2",
"type": "output",
"description": "Low-side gate driver output for half-bridge 2; connects to the gate of the low-side MOSFET."
},
{
"number": "27",
"name": "SH2",
"type": "input",
"description": "High-side source sense input for half-bridge 2; connects to the high-side MOSFET source."
},
{
"number": "28",
"name": "GH2",
"type": "output",
"description": "High-side gate driver output for half-bridge 2; connects to the gate of the high-side MOSFET."
},
{
"number": "29",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is GH4 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "30",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is SH4 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "31",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is GL4 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "32",
"name": "GND",
"type": "power_in",
"description": "Device ground; connect to system ground."
},
{
"number": "33",
"name": "CP2L",
"type": "bidirectional",
"description": "Charge pump 2 switching node; connect a 100 nF ceramic capacitor rated for PVDD between CP2H and CP2L."
},
{
"number": "34",
"name": "CP2H",
"type": "bidirectional",
"description": "Charge pump 2 switching node; connect a 100 nF ceramic capacitor rated for PVDD between CP2H and CP2L."
},
{
"number": "35",
"name": "CP1L",
"type": "bidirectional",
"description": "Charge pump 1 switching node; connect a 100 nF ceramic capacitor rated for PVDD between CP1H and CP1L."
},
{
"number": "36",
"name": "CP1H",
"type": "bidirectional",
"description": "Charge pump 1 switching node; connect a 100 nF ceramic capacitor rated for PVDD between CP1H and CP1L."
},
{
"number": "37",
"name": "VCP",
"type": "bidirectional",
"description": "Charge pump output; connect a 1 µF, 16 V ceramic capacitor between VCP and PVDD."
},
{
"number": "38",
"name": "PVDD",
"type": "power_in",
"description": "Gate driver supply input connected to the bridge supply; requires a 0.1 µF PVDD-rated ceramic capacitor and at least 10 µF bulk capacitance to GND, with a recommended operating range of 4.9 V to 37 V (40 V absolute maximum)."
},
{
"number": "39",
"name": "DRAIN",
"type": "input",
"description": "Bridge MOSFET drain voltage sense pin; connect to the common point of the high-side MOSFET drains."
},
{
"number": "40",
"name": "NC",
"type": "unconnected",
"description": "No connection."
},
{
"number": "41",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is GL5 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "42",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is SH5 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "43",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is GH5 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "44",
"name": "GH3",
"type": "output",
"description": "High-side gate driver output for half-bridge 3; connects to the gate of the high-side MOSFET."
},
{
"number": "45",
"name": "SH3",
"type": "input",
"description": "High-side source sense input for half-bridge 3; connects to the high-side MOSFET source."
},
{
"number": "46",
"name": "GL3",
"type": "output",
"description": "Low-side gate driver output for half-bridge 3; connects to the gate of the low-side MOSFET."
},
{
"number": "47",
"name": "PGND2",
"type": "power_in",
"description": "Low-side MOSFET gate driver sense and power return for the second group of gate drivers (listed as 5-8 in the RVJ table); connect to system ground close to the device and half-bridges."
},
{
"number": "48",
"name": "GL4",
"type": "output",
"description": "Low-side gate driver output for half-bridge 4; connects to the gate of the low-side MOSFET."
},
{
"number": "49",
"name": "SH4",
"type": "input",
"description": "High-side source sense input for half-bridge 4; connects to the high-side MOSFET source."
},
{
"number": "50",
"name": "GH4",
"type": "output",
"description": "High-side gate driver output for half-bridge 4; connects to the gate of the high-side MOSFET."
},
{
"number": "51",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is GH8 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "52",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is SH8 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "53",
"name": "NC",
"type": "unconnected",
"description": "No connection on the DRV8714S-Q1 (this position is GL8 on the DRV8718S-Q1); leave unconnected."
},
{
"number": "54",
"name": "DGND",
"type": "power_in",
"description": "Device ground for the digital logic; connect to system ground."
},
{
"number": "55",
"name": "DVDD",
"type": "power_in",
"description": "Device logic and digital output supply input, operating from 3 V to 5.5 V; connect a 1.0 µF, 6.3 V ceramic capacitor between DVDD and GND."
},
{
"number": "56",
"name": "nSCS",
"type": "input",
"description": "Serial chip select; logic low enables SPI communication, with an internal pull-up."
},
{
"number": "57",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pinout taken from the DRV8714S-Q1 column of the VQFN (RVJ) 56-pin tables (Table 5-1 / Table 5-4, fig; The VQFN (RVJ) 56 table describes PGND2 as sense/return for low-side gate drivers 5-8, which is a DR; The exposed thermal pad is shown in the package drawing but is not a numbered pin, so it is not incl",
"exposed pad 57 added from the footprint"
],
"pages_sent": 89,
"cost_usd": 0.611,
"at": "2026-10-19T08:24:04"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/drv8714-q1",
"pages": 193,
"sha256": "a2520e0a5afb2156",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 57,
"described": 57,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "drv8714sqrvjrq1.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
8,
8,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "54eb482f12c9d8b70c1bfc78306a1c34f412f3556e225cbd097840e5abdb7981",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "drv8714sqrvjrq1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
8,
8,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "6d6313ad803bc3c4e75564fc1befd40c4ff574bef294359d34cead416ac37684",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "VQFN-56(8x8)",
"Category": "Motor Driver ICs",
"Pins": "57"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "a2520e0a5afb2156df0a2aa2d14020aecf145af6c8970dff8790329e1c3f51cd",
"rows": [
{
"name": "Driver supply voltage PVDD",
"symbol": "VPVDD",
"kind": "recommended_operating",
"unit": "V",
"min": 4.9,
"typ": null,
"max": 37,
"conditions": "在工作温度范围内(除非另有说明)",
"source_page": 23,
"source": "datasheet"
},
{
"name": "High-side average gate drive current GHx",
"symbol": "IHS",
"kind": "recommended_operating",
"unit": "mA",
"min": 0,
"typ": null,
"max": 15,
"conditions": "在工作温度范围内(除非另有说明)",
"source_page": 23,
"source": "datasheet"
},
{
"name": "Low-side average gate drive current GLx",
"symbol": "ILS",
"kind": "recommended_operating",
"unit": "mA",
"min": 0,
"typ": null,
"max": 15,
"conditions": "在工作温度范围内(除非另有说明)",
"source_page": 23,
"source": "datasheet"
},
{
"name": "Digital supply voltage DVDD",
"symbol": "VDVDD",
"kind": "recommended_operating",
"unit": "V",
"min": 3,
"typ": null,
"max": 5.5,
"conditions": "在工作温度范围内(除非另有说明)",
"source_page": 23,
"source": "datasheet"
},
{
"name": "Digital input voltage (BRAKE, DRVOFF/nFLT, INx/ENx, INx/PHx, nSLEEP, nSCS, SCLK, SDI)",
"symbol": "VDIN",
"kind": "recommended_operating",
"unit": "V",
"min": 0,
"typ": null,
"max": 5.5,
"conditions": "在工作温度范围内(除非另有说明)",
"source_page": 23,
"source": "datasheet"
},
{
"name": "Digital output current SDO",
"symbol": "IDOUT",
"kind": "recommended_operating",
"unit": "mA",
"min": 0,
"typ": null,
"max": 5,
"conditions": "在工作温度范围内(除非另有说明)",
"source_page": 23,
"source": "datasheet"
},
{
"name": "Open-drain pull-up voltage DRVOFF/nFLT",
"symbol": "VOD",
"kind": "recommended_operating",
"unit": "V",
"min": 0,
"typ": null,
"max": 5.5,
"conditions": "在工作温度范围内(除非另有说明)",
"source_page": 23,
"source": "datasheet"
},
{
"name": "Open-drain output current DRVOFF/nFLT",
"symbol": "IOD",
"kind": "recommended_operating",
"unit": "mA",
"min": 0,
"typ": null,
"max": 5,
"conditions": "在工作温度范围内(除非另有说明)",
"source_page": 23,
"source": "datasheet"
},
{
"name": "Brake input voltage BRAKE",
"symbol": "VBRAKE",
"kind": "recommended_operating",
"unit": "V",
"min": 0,
"typ": null,
"max": null,
"conditions": "在工作温度范围内(除非另有说明);printed maximum is PVDD",
"source_page": 23,
"source": "datasheet"
},
{
"name": "Amplifier reference supply voltage AREF",
"symbol": "VAREF",
"kind": "recommended_operating",
"unit": "V",
"min": 3,
"typ": null,
"max": 5.5,
"conditions": "在工作温度范围内(除非另有说明)",
"source_page": 23,
"source": "datasheet"
},
{
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