component
DRV8353HMRTAT
Public Made by Adomby adom
Texas Instruments Motor Driver ICs, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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{
"schema_version": 1,
"type": "component",
"slug": "drv8353hmrtat",
"title": "DRV8353HMRTAT",
"brief": "Texas Instruments Motor Driver ICs, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"power supply chip",
"drv8353hmrtat",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "DRV8353HMRTAT",
"manufacturer": "Texas Instruments",
"package": "WQFN-40-EP(6x6)",
"pin_count": 41,
"category": "Power Supply Chip",
"subcategory": "Motor Driver ICs",
"datasheet": "https://www.ti.com/cn/lit/gpn/drv8353m",
"parts": {
"symbol": "drv8353hmrtat.kicad_sym",
"footprint": "drv8353hmrtat.kicad_mod",
"model_3d": "drv8353hmrtat-hero.glb",
"model_3d_plain": "drv8353hmrtat.glb",
"model_3d_step": "drv8353hmrtat-etched.step",
"model_3d_step_plain": "drv8353hmrtat.step",
"lbr": "drv8353hmrtat.lbr"
},
"distributor_links": {
"lcsc": "C2876350",
"digikey": "296-DRV8353HMRTATTR-ND",
"mouser": "595-DRV8353HMRTAT"
},
"distributor_check": {
"checked_at": "2026-11-12T19:36:11Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-DRV8353HMRTATTR-ND",
"status": "found"
},
"mouser": {
"pn": "595-DRV8353HMRTAT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "CPL",
"type": "passive",
"description": "Charge pump switching node; connect a X5R or X7R, 47-nF, VDRAIN-rated ceramic capacitor between the CPH and CPL pins."
},
{
"number": "2",
"name": "CPH",
"type": "passive",
"description": "Charge pump switching node; connect a X5R or X7R, 47-nF, VDRAIN-rated ceramic capacitor between the CPH and CPL pins."
},
{
"number": "3",
"name": "VM",
"type": "power_in",
"description": "Gate driver power supply input; connect to either VDRAIN or a separate gate driver supply, with a X5R or X7R, 0.1-µF, VM-rated ceramic and at least 10 µF of local capacitance between VM and GND."
},
{
"number": "4",
"name": "VDRAIN",
"type": "input",
"description": "High-side MOSFET drain sense input and charge pump reference; connect to the common point of the MOSFET drains."
},
{
"number": "5",
"name": "VCP",
"type": "power_out",
"description": "Charge pump output; connect a X5R or X7R, 1-µF, 16-V ceramic capacitor between the VCP and VDRAIN pins."
},
{
"number": "6",
"name": "GHA",
"type": "output",
"description": "High-side gate driver output; connect to the gate of the high-side power MOSFET."
},
{
"number": "7",
"name": "SHA",
"type": "input",
"description": "High-side source sense input; connect to the high-side power MOSFET source."
},
{
"number": "8",
"name": "GLA",
"type": "output",
"description": "Low-side gate driver output; connect to the gate of the low-side power MOSFET."
},
{
"number": "9",
"name": "SPA",
"type": "input",
"description": "Low-side source sense and shunt amplifier input; connect to the low-side power MOSFET source and high-side of the current shunt resistor."
},
{
"number": "10",
"name": "SNA",
"type": "input",
"description": "Shunt amplifier input; connect to the low-side of the current shunt resistor."
},
{
"number": "11",
"name": "SNB",
"type": "input",
"description": "Shunt amplifier input; connect to the low-side of the current shunt resistor."
},
{
"number": "12",
"name": "SPB",
"type": "input",
"description": "Low-side source sense and shunt amplifier input; connect to the low-side power MOSFET source and high-side of the current shunt resistor."
},
{
"number": "13",
"name": "GLB",
"type": "output",
"description": "Low-side gate driver output; connect to the gate of the low-side power MOSFET."
},
{
"number": "14",
"name": "SHB",
"type": "input",
"description": "High-side source sense input; connect to the high-side power MOSFET source."
},
{
"number": "15",
"name": "GHB",
"type": "output",
"description": "High-side gate driver output; connect to the gate of the high-side power MOSFET."
},
{
"number": "16",
"name": "GHC",
"type": "output",
"description": "High-side gate driver output; connect to the gate of the high-side power MOSFET."
},
{
"number": "17",
"name": "SHC",
"type": "input",
"description": "High-side source sense input; connect to the high-side power MOSFET source."
},
{
"number": "18",
"name": "GLC",
"type": "output",
"description": "Low-side gate driver output; connect to the gate of the low-side power MOSFET."
},
{
"number": "19",
"name": "SPC",
"type": "input",
"description": "Low-side source sense and shunt amplifier input; connect to the low-side power MOSFET source and high-side of the current shunt resistor."
},
{
"number": "20",
"name": "SNC",
"type": "input",
"description": "Shunt amplifier input; connect to the low-side of the current shunt resistor."
},
{
"number": "21",
"name": "SOC",
"type": "output",
"description": "Shunt amplifier output."
},
{
"number": "22",
"name": "SOB",
"type": "output",
"description": "Shunt amplifier output."
},
{
"number": "23",
"name": "SOA",
"type": "output",
"description": "Shunt amplifier output."
},
{
"number": "24",
"name": "VREF",
"type": "power_in",
"description": "Shunt amplifier power supply input and reference; connect a X5R or X7R, 0.1-µF, 6.3-V ceramic capacitor between the VREF and AGND pins."
},
{
"number": "25",
"name": "AGND",
"type": "power_in",
"description": "Device analog ground; connect to system ground."
},
{
"number": "26",
"name": "nFAULT",
"type": "output",
"description": "Fault indicator output (open-drain); pulled logic low during a fault condition and requires an external pullup resistor."
},
{
"number": "27",
"name": "MODE",
"type": "input",
"description": "PWM input mode setting; a 4-level input pin set by an external resistor (DRV8353HM only)."
},
{
"number": "28",
"name": "IDRIVE",
"type": "input",
"description": "Gate drive output current setting; a 7-level input pin set by an external resistor (DRV8353HM only)."
},
{
"number": "29",
"name": "VDS",
"type": "input",
"description": "VDS monitor trip point setting; a 7-level input pin set by an external resistor (DRV8353HM only)."
},
{
"number": "30",
"name": "GAIN",
"type": "input",
"description": "Amplifier gain setting; a 4-level input pin set by an external resistor (DRV8353HM only)."
},
{
"number": "31",
"name": "ENABLE",
"type": "input",
"description": "Gate driver enable; a logic low puts the device into low power sleep mode, and an 8 to 40-µs low pulse can be used to reset fault conditions."
},
{
"number": "32",
"name": "INHA",
"type": "input",
"description": "High-side gate driver control input; controls the output of the high-side gate driver."
},
{
"number": "33",
"name": "INLA",
"type": "input",
"description": "Low-side gate driver control input; controls the output of the low-side gate driver."
},
{
"number": "34",
"name": "INHB",
"type": "input",
"description": "High-side gate driver control input; controls the output of the high-side gate driver."
},
{
"number": "35",
"name": "INLB",
"type": "input",
"description": "Low-side gate driver control input; controls the output of the low-side gate driver."
},
{
"number": "36",
"name": "INHC",
"type": "input",
"description": "High-side gate driver control input; controls the output of the high-side gate driver."
},
{
"number": "37",
"name": "INLC",
"type": "input",
"description": "Low-side gate driver control input; controls the output of the low-side gate driver."
},
{
"number": "38",
"name": "DVDD",
"type": "power_out",
"description": "5-V internal regulator output; connect a X5R or X7R, 1-µF, 6.3-V ceramic capacitor between the DVDD and GND pins; this regulator can source up to 10 mA externally."
},
{
"number": "39",
"name": "GND",
"type": "power_in",
"description": "Device power ground; connect to system ground."
},
{
"number": "40",
"name": "VGLS",
"type": "power_out",
"description": "11-V internal regulator output; connect a X5R or X7R, 1-µF, 16-V ceramic capacitor between the VGLS and GND pins."
},
{
"number": "41",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed thermal pad of the VWQFN package is shown on the pin diagram as 'Thermal Pad' but is not; The package match is confirmed: the Package Option Addendum (page 67) lists DRV8353HMRTAT as WQFN (R; nFAULT and the KiCad ERC type set has no open-drain class in this schema, so pin 26 is mapped to 'ou"
],
"pages_sent": 8,
"cost_usd": 0.005,
"at": "2026-11-12T19:35:57"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/drv8353m",
"pages": 73,
"sha256": "b5927be7d0ce94a9",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"model_3d_generated": {
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"family": "QFN",
"height_mm": 0.8,
"height_basis": "datasheet A, max",
"standoff_mm": 0
},
"pins": {
"total": 41,
"described": 41,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "drv8353hmrtat.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.02,
6.02,
0.8
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "8e10d2ff8c3fef46232e5cb2db9a9f18a87c35b5d677db916bcc1fa3d1bfaee8",
"checked": "2026-11-12",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "drv8353hmrtat-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.02,
6.02,
0.8
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "5f4c6aa18a2d19d9c836816a796602150f01108dce2435306591fe6de890037f",
"checked": "2026-11-12",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "RTA0040B",
"source_page": 70,
"D": {
"nom_mm": 6,
"range_mm": [
5.9,
6.1
]
},
"E1": {
"nom_mm": 6,
"range_mm": [
5.9,
6.1
]
},
"e": {
"nom_mm": 0.5,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.8,
"range_mm": [
null,
0.8
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "drv8353hmrtat.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "WQFN-40-EP(6x6)",
"Category": "Power Supply Chip",
"Pins": "41"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "b5927be7d0ce94a96114f590db76c27032639c9498f089cff8afd946ca234e34",
"rows": [
{
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"min": -0.3,
"typ": null,
"max": 80,
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"source": "datasheet"
},
{
"name": "Voltage differential between ground pins (AGND, BGND, DGND, PGND)",
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"max": 0.3,
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{
"name": "MOSFET drain sense pin voltage (VDRAIN)",
"symbol": "",
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"min": -0.3,
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"max": 102,
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{
"name": "MOSFET drain sense pin voltage slew rate (VDRAIN)",
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"max": 2,
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"source": "datasheet"
},
{
"name": "Charge pump pin voltage (CPH, VCP)",
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"min": -0.3,
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},
{
"name": "Charge-pump negative-switching pin voltage (CPL)",
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"typ": null,
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},
{
"name": "Low-side gate drive regulator pin voltage (VGLS)",
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{
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{
"name": "Digital pin voltage (ENABLE, GAIN, IDRIVE, INHx, INLx, MODE, nFAULT, nSCS, SCLK, SDI, SDO, VDS)",
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