component
DRV8320HRTVR
Public Made by Adomby adom
Texas Instruments Brushless DC (BLDC) Motor Driver, WQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
drv8320hrtvr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
a8c672b
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{
"slug": "drv8320hrtvr",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Brushless DC (BLDC) Motor Driver, WQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"motor driver ics",
"drv8320hrtvr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"drv8320hrtvr.kicad_sym",
"drv8320hrtvr.kicad_mod",
"drv8320hrtvr.glb",
"drv8320hrtvr.step",
"drv8320hrtvr.lbr",
"docs/hero.png",
"docs/drv8320hrtvr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"component": {
"mpn": "DRV8320HRTVR",
"manufacturer": "Texas Instruments",
"package": "WQFN-32-EP(5x5)",
"pin_count": 33,
"category": "Motor Driver ICs",
"subcategory": "Brushless DC (BLDC) Motor Driver",
"datasheet": "https://www.ti.com/cn/lit/gpn/drv8323r",
"parts": {
"symbol": "drv8320hrtvr.kicad_sym",
"footprint": "drv8320hrtvr.kicad_mod",
"model_3d": "drv8320hrtvr-etched.glb",
"model_3d_plain": "drv8320hrtvr.glb",
"model_3d_step": "drv8320hrtvr-etched.step",
"model_3d_step_plain": "drv8320hrtvr.step",
"lbr": "drv8320hrtvr.lbr"
},
"distributor_links": {
"lcsc": "C701782"
},
"pins": [
{
"number": "1",
"name": "CPH",
"type": "power_in",
"description": "Charge pump switching node; connect X5R or X7R 47nF capacitor between CPH and CPL rated for VM voltage with 2× safety margin."
},
{
"number": "2",
"name": "VCP",
"type": "power_out",
"description": "Charge pump regulated output (VVM + 11V); connect X5R or X7R 1µF 25V ceramic capacitor between VCP and VM."
},
{
"number": "3",
"name": "VM",
"type": "power_in",
"description": "Gate driver power supply input (6V to 60V); connect to motor power and VDRAIN with ≥10µF bulk capacitance and 0.1µF bypass."
},
{
"number": "4",
"name": "VDRAIN",
"type": "input",
"description": "High-side MOSFET drain input; connect to common drain point of high-side MOSFETs and provides VDS overvoltage monitoring."
},
{
"number": "5",
"name": "GHA",
"type": "output",
"description": "High-side gate driver output phase A; drives high-side MOSFET gate with peak currents up to 1A pull and 2A sink."
},
{
"number": "6",
"name": "SHA",
"type": "bidirectional",
"description": "High-side source pin phase A; provides VDS monitoring input and high-side gate driver sink current output for phase A."
},
{
"number": "7",
"name": "GLA",
"type": "output",
"description": "Low-side gate driver output phase A; drives low-side MOSFET gate with peak currents up to 1A pull and 2A sink."
},
{
"number": "8",
"name": "SLA",
"type": "input",
"description": "Low-side source input phase A; connect to low-side MOSFET source and provides VDS monitoring input."
},
{
"number": "9",
"name": "SLB",
"type": "input",
"description": "Low-side source input phase B; connect to low-side MOSFET source and provides VDS monitoring input."
},
{
"number": "10",
"name": "GLB",
"type": "output",
"description": "Low-side gate driver output phase B; drives low-side MOSFET gate with peak currents up to 1A pull and 2A sink."
},
{
"number": "11",
"name": "SHB",
"type": "bidirectional",
"description": "High-side source pin phase B; provides VDS monitoring input and high-side gate driver sink current output for phase B."
},
{
"number": "12",
"name": "GHB",
"type": "output",
"description": "High-side gate driver output phase B; drives high-side MOSFET gate with peak currents up to 1A pull and 2A sink."
},
{
"number": "13",
"name": "GHC",
"type": "output",
"description": "High-side gate driver output phase C; drives high-side MOSFET gate with peak currents up to 1A pull and 2A sink."
},
{
"number": "14",
"name": "SHC",
"type": "bidirectional",
"description": "High-side source pin phase C; provides VDS monitoring input and high-side gate driver sink current output for phase C."
},
{
"number": "15",
"name": "GLC",
"type": "output",
"description": "Low-side gate driver output phase C; drives low-side MOSFET gate with peak currents up to 1A pull and 2A sink."
},
{
"number": "16",
"name": "SLC",
"type": "input",
"description": "Low-side source input phase C; connect to low-side MOSFET source and provides VDS monitoring input."
},
{
"number": "17",
"name": "nFAULT",
"type": "tri_state",
"description": "Fault indicator open-drain output; pulled low during VM UVLO, charge pump UVLO, VDS OCP, GDF, or thermal shutdown; requires external pull-up resistor."
},
{
"number": "18",
"name": "MODE",
"type": "input",
"description": "PWM mode selection input; 4-level input set by external resistor for 6x, 3x, 1x, or independent PWM control modes."
},
{
"number": "19",
"name": "IDRIVE",
"type": "input",
"description": "Gate drive current setting; 7-level input set by external resistor selecting peak drive currents from 10mA to 1000mA pull and 20mA to 2000mA sink."
},
{
"number": "20",
"name": "VDS",
"type": "input",
"description": "VDS overvoltage trip threshold; 7-level input set by external resistor for VDS protection threshold from 0.06V to 1.88V with adjustable degliching."
},
{
"number": "21",
"name": "NC",
"type": "unconnected",
"description": "No internal connection; this pin can be left floating or connected to system ground."
},
{
"number": "22",
"name": "ENABLE",
"type": "input",
"description": "Gate driver enable input; logic low enters low-power sleep mode drawing ≤20µA; 8µs to 40µs pulse resets latched faults without sleep."
},
{
"number": "23",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect to system ground; must be externally connected to PGND to avoid noise coupling."
},
{
"number": "24",
"name": "DVDD",
"type": "power_out",
"description": "3.3V internal regulator output; supplies internal logic and provides 30mA for external loads when bypassed with 1µF 6.3V capacitor."
},
{
"number": "25",
"name": "INHA",
"type": "input",
"description": "High-side gate driver control input phase A; in 6x PWM mode controls high-side gate driver output state."
},
{
"number": "26",
"name": "INLA",
"type": "input",
"description": "Low-side gate driver control input phase A; in 6x PWM mode controls low-side gate driver output state."
},
{
"number": "27",
"name": "INHB",
"type": "input",
"description": "High-side gate driver control input phase B; in 6x PWM mode controls high-side gate driver output state."
},
{
"number": "28",
"name": "INLB",
"type": "input",
"description": "Low-side gate driver control input phase B; in 6x PWM mode controls low-side gate driver output state."
},
{
"number": "29",
"name": "INHC",
"type": "input",
"description": "High-side gate driver control input phase C; in 6x PWM mode controls high-side gate driver output state."
},
{
"number": "30",
"name": "INLC",
"type": "input",
"description": "Low-side gate driver control input phase C; in 6x PWM mode controls low-side gate driver output state."
},
{
"number": "31",
"name": "PGND",
"type": "power_in",
"description": "Power ground; also serves as low-side MOSFET gate driver return current path; connect to system ground and externally to AGND."
},
{
"number": "32",
"name": "CPL",
"type": "power_in",
"description": "Charge pump negative switching node; connect X5R or X7R 47nF capacitor between CPH and CPL rated for VM voltage with 2× safety margin."
},
{
"number": "33",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.2",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.2",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The DRV8320HRTVR MPN is the hardware interface variant (H suffix) which uses fixed resistor-programm",
"exposed pad 33 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 95,
"cost_usd": 1.1173,
"at": "2026-09-24T06:29:20"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/drv8323r",
"pages": 95,
"sha256": "98e62c0c61f99755",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "drv8320hrtvr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
0.875
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "drv8320hrtvr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
0.875
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "86faf647883e80a2923e3fd4b8c7c150f732e471f2344c69510a49c7918b2027",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}