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README

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DRV8235RTER

TI(德州仪器) · IC · WQFN-16(3x3)

DRV8235RTER from TI(德州仪器), in a WQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IPROPI output Analog current output proportional to load current; connect a resistor from IPROPI to ground.
2 RSVD unconnected Reserved; leave this pin unconnected.
3 RSVD unconnected Reserved; leave this pin unconnected.
4 nFAULT output Open-drain fault indicator output pulled low during a fault condition; connect an external pullup resistor.
5 VM power_in Motor power supply (4.5 to 38 V); bypass to GND with a 0.1µF ceramic capacitor plus sufficient bulk capacitance rated for VM.
6 OUT1 output H-bridge output; connect directly to the motor.
7 GND power_in Device ground; connect to system ground.
8 OUT2 output H-bridge output; connect directly to the motor.
9 A1 input I2C base address select pin, tri-level input.
10 A0 input I2C base address select pin, tri-level input.
11 nSLEEP input Sleep mode input; logic high enables the device, logic low enters low-power sleep mode, with internal pulldown resistor.
12 PH/IN2 input Controls the H-bridge output; has internal pulldown.
13 EN/IN1 input Controls the H-bridge output; has internal pulldown.
14 SDA bidirectional I2C data signal; requires a pullup resistor.
15 SCL input I2C clock signal.
16 VREF power_in Analog input to set current regulation and stall detection level.
17 PAD power_in Thermal pad; connect to board ground using large ground planes on multiple layers and multiple nearby vias.

Key specifications

Parameter Value
Manufacturer TI(德州仪器)
Package WQFN-16(3x3)
Category
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply pin voltage VM -0.5 40 V VM 5
Power supply transient voltage ramp VM 0 2 V/µs VM 5
Logic pin voltage -0.3 5.75 V IN1, IN2, A1, A0, SDA, SCL, nSLEEP 5
Open-drain output pin voltage -0.3 5.75 V nFAULT 5
IPROPI pin voltage, VM ≥ 5.45 V -0.3 5.75 V VM ≥ 5.45 V 5
IPROPI pin voltage, VM < 5.45 V -0.3 V VM < 5.45 V; max printed as VVM + 0.3 V 5
Reference input pin voltage VREF 0.3 5.75 V VREF 5
Ambient temperature TA -40 125 °C 5
Junction temperature TJ -40 150 °C 5
Storage temperature Tstg -65 150 °C 5
ESD HBM V(ESD) -2000 2000 V Human body model, ANSI/ESDA/JEDEC JS-001 5
ESD CDM V(ESD) -500 500 V Charged device model, JESD22-C101 5
Power supply voltage VVM 4.5 38 V VM 5
Logic input voltage VIN 0 5.5 V IN1, IN2, A1, A0, SDA, SCL, nSLEEP 5
PWM frequency fPWM 0 200 kHz INx 5
Open drain pullup voltage VOD 0 5.5 V nFAULT 5
Open drain output current IOD 0 5 mA nFAULT 5
Peak output current IOUT 0 3.7 A OUTx 5
Current sense output current IIPROPI 0 3 mA IPROPI 5
Current limit reference voltage VVREF 0 3.3 V VREF 5
Operating ambient temperature TA -40 125 °C 5
Operating junction temperature TJ -40 150 °C 5
Junction-to-ambient thermal resistance RθJA 47.8 °C/W RTE (WQFN) 16 pins 6
Junction-to-case (top) thermal resistance RθJC(top) 48.2 °C/W 6
Junction-to-board thermal resistance RθJB 22.4 °C/W 6
Junction-to-top characterization parameter ΨJT 1.1 °C/W 6
Junction-to-board characterization parameter ΨJB 22.4 °C/W 6
Junction-to-case (bottom) thermal resistance RθJC(bot) 8.6 °C/W 6
VM sleep mode current IVMQ 0.1 1 µA nSLEEP = 0 V, VVM = 24 V, TJ = 27°C 6
VM active mode current IVM 3.5 4 mA nSLEEP = 3.3 V, IN1 = 3.3 V, IN2 = 0 V, VVM = 24 V 6
Input logic low voltage VIL 0 0.5 V 6
Input logic high voltage VIH 1.5 5.5 V 6
Input logic low current IIL -1 1 µA VI = 0 V 6
Input logic high current IIH 33 100 µA VI = 5 V 6
Tri-level input logic low voltage VTIL 0 0.6 V 6
Tri-level input Hi-Z voltage VTIHZ 1.8 2 2.2 V 6
Tri-level input logic high voltage VTIH 2.7 5.5 V 6
Output logic low voltage VOL 0.3 V IOD = 5 mA 6
Output logic high current IOZ -1 1 µA VOD = 3.3 V 6
nFAULT low pulse width tPW_nFAULT 30 50 70 µs RC Count overflow, RC_REP = 11b 6
SDA capacitive load for each bus line CB 400 pF 6
High-side MOSFET on resistance 25C RDS(ON)_HS 300 360 mΩ IOUTx = 1 A; TJ = 25 °C 6
High-side MOSFET on resistance 125C RDS(ON)_HS 450 540 mΩ IOUTx = 1 A; TJ = 125 °C 6
High-side MOSFET on resistance 150C RDS(ON)_HS 500 600 mΩ IOUTx = 1 A; TJ = 150 °C 6
Low-side MOSFET on resistance 25C RDS(ON)_LS 300 360 mΩ IOUTx = -1 A; TJ = 25 °C 6
Low-side MOSFET on resistance 125C RDS(ON)_LS 450 540 mΩ IOUTx = -1 A; TJ = 125 °C 6
Low-side MOSFET on resistance 150C RDS(ON)_LS 500 600 mΩ IOUTx = -1 A; TJ = 150 °C 7
Internal reference voltage VREF_INT 2.88 3 3.12 V INT_VREF = 1b 7
Current mirror total error AERR -10 10 % IOUT = 0.1 A, VVM ≥ 5.5 V 7
Current mirror total error AERR -7 7 % 0.15 A ≤ IOUT < 0.5 A, VVM ≥ 5.5 V 7
Current mirror total error AERR -5 5 % IOUT ≥ 0.5 A, VVM ≥ 5.5 V 7
Inrush time blanking for stall detection tINRUSH 5 6716 ms 7
VM UVLO rising VUVLO_VM 4.15 4.3 4.45 V Supply rising 7
VM UVLO falling VUVLO_VM 4.05 4.2 4.35 V Supply falling 7
Thermal shutdown temperature TTSD 150 175 °C 7
Line regulation ΔVLINE -2 2 % 5.5 V ≤ VVM ≤ 38 V, VOUT = 5 V, IOUT = 2 A 7
Load regulation ΔVLOAD -1 1 % VVM = 24 V, VOUT = 5 V, IOUT = 100 mA to 2 A 7
Current scaling factor AIPROPI 1500 µA/A 7
Overcurrent protection trip point IOCP 3.7 A 7
Standard mode SCL clock frequency fSCL 0 100 kHz STANDARD MODE 7
Fast mode SCL clock frequency fSCL 0 400 kHz FAST MODE 8

CAD (KiCad official)

  • Symbol: DRV8235RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16(3x3) (KiCad packages3D, STEP)
  • 3D model files: drv8235rter-etched.step / drv8235rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8235rter.step / drv8235rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TI(德州仪器) datasheet (87 pp, sha256 aaf9b507363a6e28, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF