component
DRV5013AGELPGQ1
Public Made by Adomby adom
Texas Instruments Hall Switches, TO-92. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DRV5013AGELPGQ1
Texas Instruments · Hall Switches · TO-92
DRV5013AGELPGQ1 from Texas Instruments, in a TO-92. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply pin for 2.7 V to 38 V operation; bypass it to GND with a 0.01-µF (minimum) ceramic capacitor rated for VCC. |
| 2 | GND | power_in | Ground pin for the device. |
| 3 | OUT | output | Hall sensor open-drain output that requires a resistor pullup. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TO-92 |
| Category | Magnetic Sensors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VCC | 2.7 | 38 | V | 4 | ||
| Operate point | BOP | 3 | 6 | 9 | mT | DRV5013AG: ±6 mT; see Figure 7-2 | 6 |
| Release point | BRP | -9 | -6 | -3 | mT | DRV5013AG: ±6 mT; see Figure 7-2 | 6 |
| Magnetic offset | BO | -1.5 | 0 | 1.5 | mT | DRV5013AG: ±6 mT; BO = (BOP + BRP) / 2 | 6 |
| Operating supply current | ICC | 3 | 3.5 | mA | VCC = 2.7 V to 38 V, TA = TA, MAX | 5 | |
| Power-on time | ton | 35 | 50 | µs | AD, AG, BC versions | 5 | |
| FET on-resistance | rDS(on) | 36 | 50 | Ω | VCC = 3.3 V, IO = 10 mA, TA = 125 | 5 | |
| Off-state leakage current | Ilkg(off) | 1 | µA | Output Hi-Z | 5 | ||
| Overcurrent protection level | IOCP | 15 | 30 | 45 | mA | OUT shorted VCC | 5 |
| Output delay time | td | 13 | 25 | µs | B = BRP, 10 mT to BOP + 10 mT in 1 µs | 5 | |
| Absolute maximum power supply voltage | VCC | -22 | 40 | V | Specified by design; only tested to -20 V at minimum | 4 | |
| Output pin voltage | -0.5 | 40 | V | 4 | |||
| Output pin reverse current during reverse supply condition | 0 | 100 | mA | 4 | |||
| Operating junction temperature E grade | TJ | -40 | 175 | °C | E, see Figure 9-1 | 4 | |
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Output pin voltage (OUT) | VO | 0 | 38 | V | 4 | ||
| Output pin current sink (OUT) | ISINK | 0 | 30 | mA | Power dissipation and thermal limits must be observed | 4 | |
| Operating ambient temperature E grade | TA | -40 | 150 | °C | E, see Figure 9-1 | 4 | |
| Junction-to-ambient thermal resistance (LPG TO-92) | RθJA | 180 | °C/W | 4 | |||
| Junction-to-case (top) thermal resistance (LPG TO-92) | RθJC(top) | 98.6 | °C/W | 4 | |||
| Junction-to-board thermal resistance (LPG TO-92) | RθJB | 154.9 | °C/W | 4 | |||
| Junction-to-top characterization parameter (LPG TO-92) | ψJT | 40 | °C/W | 4 | |||
| Junction-to-board characterization parameter (LPG TO-92) | ψJB | 154.9 | °C/W | 4 | |||
| Hysteresis | Bhys | 12 | mT | DRV5013AG: ±6 mT; Bhys = (BOP, BRP) | 6 | ||
| Bandwidth | ƒBW | 20 | 30 | kHz | 6 | ||
| Operating supply current at 25°C | ICC | 2.7 | mA | VCC = 2.7 V to 38 V, TA = 25°C | 5 | ||
| Reverse supply voltage | VCCR | -22 | V | 5 | |||
| Rise time (10% to 90%) | tr | 200 | ns | R1 = 1 kΩ, CO = 50 pF, VCC = 3.3 V | 5 | ||
| Fall time (90% to 10%) | tf | 31 | ns | R1 = 1 kΩ, CO = 50 pF, VCC = 3.3 V | 5 | ||
| FET on-resistance at 25°C | rDS(on) | 22 | Ω | VCC = 3.3 V, IO = 10 mA, TA = 25°C | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | • Corrected body size of SOT-23 package and SIP package name to TO-92 ..................................................... 1 • Added BMAX to Absolute Maximum Ratings ................................. | 3 |
CAD (KiCad official)
- Symbol:
DRV5013AGELPGQ1 - Footprint:
Package_TO_SOT_THT:TO-92_Inline - 3D model: TO-92 (KiCad packages3D, STEP)
- 3D model files:
drv5013agelpgq1-etched.step/drv5013agelpgq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);drv5013agelpgq1.step/drv5013agelpgq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
26782fcc8dd907fe, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DRV5013AGELPGQ1
**Texas Instruments** · Hall Switches · TO-92
DRV5013AGELPGQ1 from Texas Instruments, in a TO-92. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply pin for 2.7 V to 38 V operation; bypass it to GND with a 0.01-µF (minimum) ceramic capacitor rated for VCC. |
| 2 | GND | power_in | Ground pin for the device. |
| 3 | OUT | output | Hall sensor open-drain output that requires a resistor pullup. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TO-92 |
| Category | Magnetic Sensors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VCC | 2.7 | | 38 | V | | 4 |
| Operate point | BOP | 3 | 6 | 9 | mT | DRV5013AG: ±6 mT; see Figure 7-2 | 6 |
| Release point | BRP | -9 | -6 | -3 | mT | DRV5013AG: ±6 mT; see Figure 7-2 | 6 |
| Magnetic offset | BO | -1.5 | 0 | 1.5 | mT | DRV5013AG: ±6 mT; BO = (BOP + BRP) / 2 | 6 |
| Operating supply current | ICC | | 3 | 3.5 | mA | VCC = 2.7 V to 38 V, TA = TA, MAX | 5 |
| Power-on time | ton | | 35 | 50 | µs | AD, AG, BC versions | 5 |
| FET on-resistance | rDS(on) | | 36 | 50 | Ω | VCC = 3.3 V, IO = 10 mA, TA = 125 | 5 |
| Off-state leakage current | Ilkg(off) | | | 1 | µA | Output Hi-Z | 5 |
| Overcurrent protection level | IOCP | 15 | 30 | 45 | mA | OUT shorted VCC | 5 |
| Output delay time | td | | 13 | 25 | µs | B = BRP, 10 mT to BOP + 10 mT in 1 µs | 5 |
| Absolute maximum power supply voltage | VCC | -22 | | 40 | V | Specified by design; only tested to -20 V at minimum | 4 |
| Output pin voltage | | -0.5 | | 40 | V | | 4 |
| Output pin reverse current during reverse supply condition | | 0 | | 100 | mA | | 4 |
| Operating junction temperature E grade | TJ | -40 | | 175 | °C | E, see Figure 9-1 | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Output pin voltage (OUT) | VO | 0 | | 38 | V | | 4 |
| Output pin current sink (OUT) | ISINK | 0 | | 30 | mA | Power dissipation and thermal limits must be observed | 4 |
| Operating ambient temperature E grade | TA | -40 | | 150 | °C | E, see Figure 9-1 | 4 |
| Junction-to-ambient thermal resistance (LPG TO-92) | RθJA | | 180 | | °C/W | | 4 |
| Junction-to-case (top) thermal resistance (LPG TO-92) | RθJC(top) | | 98.6 | | °C/W | | 4 |
| Junction-to-board thermal resistance (LPG TO-92) | RθJB | | 154.9 | | °C/W | | 4 |
| Junction-to-top characterization parameter (LPG TO-92) | ψJT | | 40 | | °C/W | | 4 |
| Junction-to-board characterization parameter (LPG TO-92) | ψJB | | 154.9 | | °C/W | | 4 |
| Hysteresis | Bhys | | 12 | | mT | DRV5013AG: ±6 mT; Bhys = (BOP, BRP) | 6 |
| Bandwidth | ƒBW | 20 | 30 | | kHz | | 6 |
| Operating supply current at 25°C | ICC | | 2.7 | | mA | VCC = 2.7 V to 38 V, TA = 25°C | 5 |
| Reverse supply voltage | VCCR | | -22 | | V | | 5 |
| Rise time (10% to 90%) | tr | | 200 | | ns | R1 = 1 kΩ, CO = 50 pF, VCC = 3.3 V | 5 |
| Fall time (90% to 10%) | tf | | 31 | | ns | R1 = 1 kΩ, CO = 50 pF, VCC = 3.3 V | 5 |
| FET on-resistance at 25°C | rDS(on) | | 22 | | Ω | VCC = 3.3 V, IO = 10 mA, TA = 25°C | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | | • Corrected body size of SOT-23 package and SIP package name to TO-92 ..................................................... 1 • Added BMAX to Absolute Maximum Ratings ................................. | 3 |
## CAD (KiCad official)
- Symbol: `DRV5013AGELPGQ1`
- Footprint: `Package_TO_SOT_THT:TO-92_Inline`
- 3D model: TO-92 (KiCad packages3D, STEP)
- 3D model files: `drv5013agelpgq1-etched.step` / `drv5013agelpgq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv5013agelpgq1.step` / `drv5013agelpgq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/drv5013-q1.pdf) (33 pp, sha256 `26782fcc8dd907fe`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/drv5013agelpgq1-datasheet.pdf)